A dual-mode 28 GHz power amplifier (PA) for 5G applications was designed in a domestic 40 nm CMOS process. The large-sized transistors were used in the power stage to obtain higher saturated output power. The common-mode oscillation problem of power amplifier caused by large size transistors was eliminated by using non-center tapped transformer. A large resistor was utilized at the gate of the common-gate transistor in the cascode topology to improve high frequency stability. The common gate shorting technique was applied to solve the differential gain loss produced by this large resistor. A varactor was used in the inter-stage matching network to realize a dual-mode switching, so high power gain and wide bandwidth were obtained respectively. The post-circuit simulation results showed that, in high gain mode, the dual-mode PA achieved a saturated output power of 20.8 dB, a power added efficiency of 24.5% and a power gain of 28.1 dB. In high bandwidth mode, a saturated output power of 20.6 dBm, a power added efficiency of 22.6% and a 3 dB bandwidth of 12.2 GHz were obtained.