Based on the SCM and the complex programmable logic device (CPLD) technique, the basic design methods of SCM module, CPLD management module and the drive circuit module are introduced. The design way of addressing the peripheral RAM by the hardware circuit of the CPLD is explained, the diagram of time sequence of the addressing RAM circuit is given out at the same time. The pulse sequence code generated by the control circuit is proved to have the virtue of high precision, high speed and the changable interval through observing the oscilloscope (TDS5104B).