A CMOS readout IC for five-spectrum-band TDICCD detector was developed to address the digitization and high-speed readout requirements of 3D integrated multispectral TDI-CMOS image sensors and to solve the matching and consistency problems of the overall layout, physical size and I/O interface with the TDICCD detector. A new column single-slope ADC architecture was designed for this readout IC, which used multi-phase ADC clock and supported correlated multiple sampling (CMS), realizing the digitization and high-speed output of TDICCD output signals and effectively improving the dynamic range and noise performance of the TDICCD detector. The tests after tapeout show that the readout IC functions normally, the imaging results of the integrated TDICCD detector is good and the new column ADC works fine. The readout IC outputs 14 bit data with a minimum line readout period of 9.5 μs, and the CMS reduces output noise effectively, realizing the high-precision digital processing and high-speed output of the TDICCD output signal, and meeting the requirements of 3D integrated TDI-CMOS image sensor development.