An optimal solution of motion estimation can be obtained using the full search algorithm. However, its implementation requires a large number of operations. This paper introduces a new three-step method, in which, by adding an inner loop search within the search for the first time and applying the abort discrimination technique, the acceleration of stationary block matching can be realized, and the search process can be completed quickly. The algorithm reduces the total number of searches to ensure a certain precision and thus greatly improves search efficiency. Given the process description of the algorithm, search template, etc., the soft core design of the field-programmable gate array (FPGA) is completed using a hardware programming language, and the function simulation is completed using a software tool. The results show that the algorithm utilizes 2177 FPGA logic units and 37112-bit block memory. The soft core can quickly acquire motion vectors and complete the search process.