Fig. 1. Design and simulation of the on-chip integrated CdTe waveguide. (a) The 3D structure diagram of the CdTe/CdS/Si waveguide. The width (W_CdTe), height (H_CdTe), and thickness (H_CdS) of the CdTe waveguide are 20 µm, 8 µm, and 5 µm, respectively; (b) The propagation loss caused by the CdS layers with different thickness (3 µm, 5 µm, 10 µm, and 15 µm); (c) Total dispersion and mode confinement ratio of the TE mode in CdTe with 20 µm height and 8 µm width; (d) The SCG in the waveguide pumped with 5.5 µm, 15 kW pulse; (e) and (f) are the time-domain pulse and frequency-domain spectral evolution diagrams of the pulse propagated in a 1 cm-long CdTe waveguide, respectively

Fig. 2. Waveguide fabrication flow chart and scanning electron microscope images. (a) The waveguide fabrication flow chart; (b) The waveguide surface topography. The height and width of the waveguide are 8.5 µm and 22 µm, respectively. The angle between the side wall of the waveguide and the CdS layer is 90°; (c) The side and top topography of the waveguide

Fig. 3. (a) The experimental setup diagram. The inset shows the field distribution of the TE mode at 1030 nm wavelength in the waveguide; (b) The broadened spectrum from the waveguide at different pump power

Fig. 4. Spectral broadening caused by self-phase modulation (SPM) in the CdTe waveguide based on GNLSE. (a) The output spectrum of the waveguide at different peak power (5 kW~20 kW) pumped at 1030 nm wavelength; (b), (d), (f), (h) The time-domain evolution diagrams of SCG process; (c), (e), (g), (i) The frequency-domain evolution diagrams of the SCG process