• Chinese Optics Letters
  • Vol. 22, Issue 8, 082501 (2024)
Ye Jin1,2,3, Yujun Xie1,2,3, Zhihan Zhang2,4,5, Donglai Lu2,4..., Menghan Yang1,2,3, Ang Li1,2,3, Xiangyan Meng1,2,3, Yang Qu1,2,3, Leliang Li2,4, Nuannuan Shi1,2,3, Wei Li1,2,3, Ninghua Zhu1,2,3, Nan Qi2,4,* and Ming Li1,2,3,**|Show fewer author(s)
Author Affiliations
  • 1Key Laboratory of Optoelectronic Materials and Devices, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 2Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100190, China
  • 3School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 4Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 5Peng Cheng Laboratory, Shenzhen 518055, China
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    DOI: 10.3788/COL202422.082501 Cite this Article Set citation alerts
    Ye Jin, Yujun Xie, Zhihan Zhang, Donglai Lu, Menghan Yang, Ang Li, Xiangyan Meng, Yang Qu, Leliang Li, Nuannuan Shi, Wei Li, Ninghua Zhu, Nan Qi, Ming Li, "4 × 112 Gb/s hybrid integrated silicon receiver based on photonic-electronic co-design," Chin. Opt. Lett. 22, 082501 (2024) Copy Citation Text show less
    (a) Architecture and schematic of the proposed optical receiver; (b) 3D model diagram of the p-i-n PD; (c) cross-sectional schematic of the PD.
    Fig. 1. (a) Architecture and schematic of the proposed optical receiver; (b) 3D model diagram of the p-i-n PD; (c) cross-sectional schematic of the PD.
    Simulation results for the proposed PD. (a) Responsivity and bandwidth versus the length of the Ge region; (b) S21 curves and energy distribution at a length of 20 µm.
    Fig. 2. Simulation results for the proposed PD. (a) Responsivity and bandwidth versus the length of the Ge region; (b) S21 curves and energy distribution at a length of 20 µm.
    (a) Equivalent circuit model of PD; (b) bandwidth and peaking versus the inductance induced by wire bonding; (c) wire bonding with a common PCB (left) and a customized PCB (right); (d) frequency responses from co-simulation method; (e) simulated group delay at different EQ strengths; (f) simulated eye diagrams at different EQ strengths.
    Fig. 3. (a) Equivalent circuit model of PD; (b) bandwidth and peaking versus the inductance induced by wire bonding; (c) wire bonding with a common PCB (left) and a customized PCB (right); (d) frequency responses from co-simulation method; (e) simulated group delay at different EQ strengths; (f) simulated eye diagrams at different EQ strengths.
    Proposed SiPh receiver. (a) Micrograph of two chips on the test board; (b) graph of hybrid integration by co-packaging; (c) experimental setup for the O-E response.
    Fig. 4. Proposed SiPh receiver. (a) Micrograph of two chips on the test board; (b) graph of hybrid integration by co-packaging; (c) experimental setup for the O-E response.
    (a) Measured O-E S-parameters of the PD and the proposed optical receiver; (b) measured I-V curves (including dark current and light current) and responsivity of the PD used.
    Fig. 5. (a) Measured O-E S-parameters of the PD and the proposed optical receiver; (b) measured I-V curves (including dark current and light current) and responsivity of the PD used.
    Measured eye diagrams. Optical input at (a) 56 Gb/s NRZ and (b) 112 Gb/s PAM-4; electrical output from CH1 at (c) 56 Gb/s NRZ, (d) 80 Gb/s PAM-4; electrical output at 112 Gb/s PAM-4 from (e) CH1, (f) CH2, (g) CH3, and (h) CH4.
    Fig. 6. Measured eye diagrams. Optical input at (a) 56 Gb/s NRZ and (b) 112 Gb/s PAM-4; electrical output from CH1 at (c) 56 Gb/s NRZ, (d) 80 Gb/s PAM-4; electrical output at 112 Gb/s PAM-4 from (e) CH1, (f) CH2, (g) CH3, and (h) CH4.
    (a) Measured results of BERs versus the input optical power of the PD at 56 Gb/s in NRZ and 112 Gb/s in PAM-4; (b) measured THD of the EIC.
    Fig. 7. (a) Measured results of BERs versus the input optical power of the PD at 56 Gb/s in NRZ and 112 Gb/s in PAM-4; (b) measured THD of the EIC.
    Ref.Channel Amount3 dB Bandwidth (GHz)Channel Data Rate (Gb/s)Power Consumption (pJ/bit)PD Responsivity (A/W)Sensitivity (dBm)IC Process
    [28]45590 (NRZ)2.50.76 (C band)−7 (KP4-FEC)SiGe-BiCMOS 55 nm
    [22]1N/A100 (PAM-4)N/A1 (C band)1 (7% FEC)SiGe-CMOS 28 nm
    [23]136.8100 (NRZ)3.50.75 (C band)−8 (20% FEC)SiGe-BiCMOS 180 nm
    [24]4N/A106 (PAM-4)1.50.63 (C band)−5 (KP4-FEC)SiGe-BiCMOS 55 nm
    [25] (flip-chip)42750 (NRZ)1.11 (O band)−7.5 (10–12)SiGe-BiCMOS 50 nm
    [26] (flip-chip)137.1112 (PAM-4)2.80.85 (O band)−6 (KP4-FEC)SiGe-BiCMOS 180 nm
    [27] (flip-chip)146160 (PAM-4)1.70.85 (C band)−3 (KP4-FEC)N/A
    This work448112 (PAM-4)2.20.96 (C band)−4@PAM-4−7.5@NRZ (KP4-FEC)SiGe-BiCMOS 180 nm
    Table 1. Comparison with State-of-the-Art High-Speed Optical Receivers
    Ye Jin, Yujun Xie, Zhihan Zhang, Donglai Lu, Menghan Yang, Ang Li, Xiangyan Meng, Yang Qu, Leliang Li, Nuannuan Shi, Wei Li, Ninghua Zhu, Nan Qi, Ming Li, "4 × 112 Gb/s hybrid integrated silicon receiver based on photonic-electronic co-design," Chin. Opt. Lett. 22, 082501 (2024)
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