Study on High Temperature Characteristics of 28 nm Ultra-Thin-Body FD-SOI

ZHANG Haoyi; ZENG Chuanbin; LI Xiaojing; GAO Linchun; LUO Jiajun; HAN Zhengsheng

doi:10.13911/j.cnki.1004-3365.200502

[1] FENOUILLET-BERANGER C, PERREAU P, DENORME S, et al. Impact of a 10 nm ultra-thin BOX (UTBOX) and ground plane on FDSOI devices for 32 nm node and below ［C］ // IEEE Proceed ESSCIRC. Athens, Greece. 2009: 89-92.

[2] MONFRAY S, FENOUILLET-BERANGER C, BIDAL G, et al. Thin-film devices for low power applications ［J］. Sol Sta Elec, 2010, 54(2): 90-96.

[3] ANDRIEU F, WEBER O, MAZURIER J, et al. Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20 nm low power CMOS and beyond ［C］ // IEEE Symp VLSI Technol. Honolulu, HI, USA. 2010: 57-58.

[4] FAYNOT O, ANDRIEU F, WEBER O, et al. Planar fully depleted SOI technology: a powerful architecture for the 20 nm node and beyond ［C］ // IEEE IEDM. San Francisco, CA, USA. 2010: 1-4.

[5] BURIGNAT S, FLANDRE D, ARSHAD M K M, et al. Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel ［J］. Sol Sta Elec, 2010, 54(2): 213-219.

[6] LIM H K, FOSSUM J G. Threshold voltage of thin-film silicon-on-insulator (SOI) MOSFET’s ［J］. IEEE Trans Elec Dev, 1983, 30(10): 1244-1251.

[7] COLINGE J P, COLINGE C A. Physics of semiconductor devices ［M］. New York: Springer, 2006: 80-89.

[8] MCKITTERICK J B, GOETZ G, O’CONNOR J M, et al. An SOI smart-power solenoid driver for 300 ℃ operation ［C］ // Proc 3rd Int High Temper Elec Conf. Albuquerque, NM, USA. 1996: 17-22.

[9] FLEETWOOD D M, THOME F V, TSAO S S, et al. High-temperature silicon-on-insulator electronics for space nuclear power systems: requirements and feasibility ［J］. IEEE Trans Nucl Sci, 1988, 35(5): 1099-1112.

[10] MCKITTERICK J B. Very thin silicon-on-insulator devices for CMOS at 500 ℃ ［C］ // Proceed 1st Int High Temperat Elec Conf. Santa Clara, CA, USA. 1991: 42-43.

[11] EGGERMONT J P, CEUSTER D D, FLANDRE D, et al. Design of SOI CMOS operational amplifiers for applications up to 300 ℃ ［J］. IEEE J Sol Sta Circ, 1996, 31(2): 179-186.