• Microelectronics
  • Vol. 51, Issue 2, 198 (2021)
YUAN Jun, ZHOU Yi, MAO Dingchang, CHIO U Fat, and WANG Wei
Author Affiliations
  • [in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.200267 Cite this Article
    YUAN Jun, ZHOU Yi, MAO Dingchang, CHIO U Fat, WANG Wei. Design of a PWM Buck DC-DC Converter with Segmented Output[J]. Microelectronics, 2021, 51(2): 198 Copy Citation Text show less
    References

    [1] CHIA C H, LEI P S, CHANG R C H. A high-efficiency PWM DC-DC buck converter with a novel DCM control under light-load [C] ∥ IEEE ISCAS. Rio de Janeiro, Brazil. 2011: 237-240.

    [2] PARK Y J, PARK J H, KIM H J, et al. A design of a 92.4% efficiency triple mode control DC-DC buck converter with low power retention mode and adaptive zero current detector for IoT/wearable applications [J]. IEEE Trans Power Elec, 2016, 32(9): 6946-6960.

    [3] KIM S Y, PARK Y J, ALI I, et al. Design of a high efficiency DC-DC buck converter with two-step digital PWM and low power self-tracking zero current detector for IoT applications [J]. IEEE Trans Power Elec, 2017, 33(2): 1428-1439.

    [4] NGA T T K, ABBASIZADEH H, THUONG T V C, et al. A high efficiency digital PWM DC-DC converter using hybrid control technique for EH applications [C] ∥ ISOCC. Seoul, South Korea. 2017: 204-205.

    [5] PARK S H, KIM K T, LEE K Y. Buck DC-DC converter with PFM/PWM dual mode self-tracking zero current detector [C] ∥ ISOCC. Seoul, South Korea. 2017: 186-187.

    [6] SHIN Y H, KIM H Y, KIM J W, et al. Efficiency improvement of dual mode DC-DC buck converter under light load using PTWS with a zero current detector [C] ∥ ICCSS. London, UK. 2017: 72-75.

    [7] WANG C C, HSU C J. An on-chip PWM-based DC-DC buck converter design with high efficiency light load mode operation [C] ∥ Proc Int Conf Elec Engineer Info. Bangkok, Thailand. 2018: 146-150.

    [8] MA Y Z. Integrated lossless load current sensing method for buck-boost DC-DC converters [J]. Elec Lett, 2015, 51(1): 88-90.

    [10] YANG W B, SUN C H, HUANG Z A, et al. Single inductor dual-output DC-DC converters with new type ramp and clock generator [C] ∥ IEEE ICASI. Chiba, Japan. 2018: 1009-1011.

    YUAN Jun, ZHOU Yi, MAO Dingchang, CHIO U Fat, WANG Wei. Design of a PWM Buck DC-DC Converter with Segmented Output[J]. Microelectronics, 2021, 51(2): 198
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