An analog baseband (ABB) for the 24 GHz Doppler/ FMCW dual-mode radar system was designed in a 55 nm CMOS process. The low pass filter was realized by two modified Tow-Thomas bi-quad stages to adjust the gain and the bandwidth independently. In order to cancel the DC offset produced by the mixer and caused by the ABB mismatch in Doppler mode with 10~600 Hz low intermediate frequency, a two-step successive approximation register DC-offset cancellation (SAR DCOC) circuit based on a 7 bit current-programmable digital-to-analog converter (IDAC) was employed. In order to improve low frequency noise performance, the BJT devices were used in the proposed low pass filter and IDAC circuits. The post-layout simulation results showed that the proposed ABB achieved a gain from 6 to 62 dB and a maximum linear input amplitude (IP1 dB) of 10 dBm in both modes while drawing 49 mA from 25 V power supply. When the gain was 62 dB, the noise figure at Doppler and FMCW mode were lower than 42 dB and 27 dB, respectively. The Monte Carlo simulation results showed that the output DC offset were 213 mV and 164 mV while the input DC offset were 400 mV and 200 mV, respectively.