A design method is provided for driving circuit of electronic multiplication CCD (EMCCD). Waveforms in accordance with the requirements of EMCCD timing sequence are generated by field programmable gate array (FPGA). Level conversion is performed to FPGA output signal by EL7457 high speed metal-oxide-semiconductor field effect transistor (MOSFET) driving chip so as to meet the requirements of EMCCD driving voltage. And high voltage signals are driven by discrete push-pull amplifier circuits. Output voltage can be adjusted from 20 V to 50 V and pixel read frequency is 5 MHz. Experimental results show that EMCCD is at normal operation state in the driving circuit and effective signals are output.