The last few years have witnessed rapid progress towards the realization of artificial intelligence (AI), especially software AI thanks to the advances in the development of the algorithm. Note that software AI is typically demonstrated based on the digital computer with conventional Von Neumann architectures at the cost of huge power consumption and massive data throughput^[1]. In contrast, hardware AI systems based on in-memory computing architecture can handle probabilistic and unstructured problems with low power dissipation resembling biological neural networks. Recently, memristor has attracted increasing attention as a promising candidate for the construction of hardware neuromorphic computing systems due to its prominent advantages, including simple structure and rich switching dynamics resembling biological synapses and neurons^{[2⇓⇓⇓⇓⇓-8]}.

Emerging two-dimensional (2D) materials, especially 2D layered transition metal dichalcogenides (TMDs), are actively studied for fabricating high-performance nanoelectronic devices^[9⇓-11]. The 2D TMDs have shown prospective potential for memristor applications, and these devices could be of use in both information storage and neuromorphic computing^[12]. Such devices exhibit properties that traditional thin film-based memristors do not have, including high thermal stability^[13], high controllability of potentiation, depression and relaxation^[14], excellent flexibility and transparency^[15]. However, memristors based on 2D TMDs are typically fabricated by mechanical exfoliation, which is not feasible for large- scale array preparation. Thus, the yield and device-to- device variability of 2D TMD-based devices are rarely reported.

Herein, the memristive devices were prepared based on 2D MoTe₂ film fabricated by chemical vapor deposition (CVD). This MoTe₂ device shows stable bipolar resistive switching with superior retention characteristics, good endurance, high yield, and excellent uniformity. Furthermore, without selector devices, a 3×3 memristor array was demonstrated based on the MoTe₂ film. And, a handwritten digits recognition neural network simulation was implemented using the prepared MoTe₂ devices as synapses. This work indicates that large-scale 2D TMDs films are promising materials for future neuromorphic computing.

2D MoTe₂ film was prepared through the CVD method. Firstly, a 1 nm Mo film was deposited onto a heavily doped Si substrate with 300 nm SiO₂ by electron beam evaporation. Then the Mo film was fully oxidized to MoO₃ in air. The resulting MoO₃ film was placed in a ceramic crucible containing Te powder. A mixture of argon and hydrogen was used as carrier gas and formed a reducing atmosphere during the CVD growth. The MoO₃ film was tellurized into a MoTe₂ film after annealing in Te vapor at 700 ℃. The bottom conductive layer (30 nm Au/10 nm Ti) and the top conductive layer (100 nm Au/10 nm Ti) were deposited through DC sputtering and lift-off process. And the MoTe₂ film was transferred onto the bottom conductive layer through the polymethyl methacrylate (PMMA) transfer method. The transfer process is shown schematically in Fig. S1.

The component of the MoTe₂ film was measured by Raman spectra with an inVia Reflex spectrometer operated under a 532 nm laser and the XRD measurement (Bruker D8 Advance). An optical microscope (DSX 510) was employed to check the structure of the Au/Ti/MoTe₂/Au/Ti device. The thickness and the structure of the memristor array were measured through an atomic force microscope (AFM, SPM9700). All electrical measurements were conducted in air at room temperature with a Keithley 4200 semiconductor characterization system connected with a tabletop cryogenic probe station (PS-100, Lakeshore).

Fig. 1(a) shows a typical photo of the MoTe₂ film after being transferred on the silicon substrate with bottom electrodes. The film is uniform and continuous across the whole area (~1 cm), as seen from the homogeneous color contrast in the image. And, this thin film is pure MoTe₂ without other phases, which is verified by the XRD measurement (Fig. S2). Raman spectroscopy was further employed to investigate the structure of the prepared MoTe₂ film, as shown in Fig. 1(b). The MoTe₂ film shows several Raman peaks between 100 and 300 cm^-1: the out-of-plane A_1g mode at ~171 cm^-1 and the prominent peak of the in-plane E_2g mode at ~233 cm^-1. These Raman features coincide with those observed in few-layer MoTe₂ with the hexagonal (2H) phase, thus unequivocally identifying the as-grown film as 2H MoTe₂^[16-17].

After characterization of the MoTe₂ film, the Au/Ti/ MoTe₂/Au/Ti device was fabricated through the PMMA transfer method and lift-off process, and the detailed fabrication process is shown in Fig. S3. The optical image of 50 Au/Ti/MoTe₂/Au/Ti devices is presented in Fig. 1(c).

In addition to the independent MoTe₂ device, a 3×3 memristor array was prepared based on the continuous MoTe₂ film. The optical image of the 3×3 memristor array is shown in Fig. 1(d). And the atomic force microscope (AFM) image and height profiles of the prepared array (Fig. S4) demonstrate that the MoTe₂ film can adapt to the contour morphology of the bottom electrodes, resulting in a conformal coating.

After the electroforming process (Fig. S5), stable bipolar resistive switching was obtained when the voltage was swept between -0.8 and 1.0 V, as shown in Fig. 2(a). During a continuous bias sweeping from 0 V→1 V→-0.8 V→0 V, a pinched hysteresis loop was obtained, in which SET (switching from high resistance state (HRS) to low resistance state (LRS)) occurred at about 0.7 V and RESET (switching from LRS to HRS) happened at about -0.5 V. A compliance current of 3 mA was applied in the SET process to prevent hard breakdown. This hysteresis behavior is reproducible in the successive 20 voltage sweeps, indicating the stability of the switching behavior in the present device. The retention characteristics of the MoTe₂ device were measured at room temperature, as shown in Fig. 2(b). The ON/OFF ratio is higher than 10 and the current levels of the HRS and LRS show no degradation for 500 s, indicating good retention of the device.

In addition to stable bipolar switching behavior and good retention characteristic, the MoTe₂ device exhibits fast switching and good endurance. Current responses of the MoTe₂ device under the SET and RESET pulses are presented in Fig. 3(a-b). It was found that the device could be switched to LRS in about 60 ns and switched back to HRS in about 280 ns. Furthermore, over 2000 switching cycles can be obtained under SET pulse of 1.7 V/700 ns and RESET pulse of -1.2 V/7 μs (Fig. 3(c)), indicating good endurance of the present MoTe₂ device.

The yield and uniformity of the prepared device are systematically studied, since they are crucial for the construction of large-scale memristor arrays. Among 25 prepared devices, 24 devices show stable bipolar resistive switching behavior similar to that shown in Fig. 2(a), indicating a yield of 96%. We statistically analyzed 480 I-V curves collected in 24 devices (detailed results are shown in Fig. S6), and quantified the cycle- to-cycle and the device-to-device variability of the SET voltage (V_SET), RESET voltage (V_RESET), HRS and LRS by calculating the coefficient of variation (C_V) as the standard deviation (σ) divided by the mean value (μ), in absolute value^[18]. The cycle-to-cycle variability in a single device results from the stochastic nature of the switching process, and the device-to-device variability is attributed to inhomogeneity in the samples derived from the fabrication process^[19], such as device area and thickness fluctuations, and so on.

The minimum cycle-to-cycle variabilities of V_SET and V_RESET are 6.6% and 5.2% for a given device, respectively, and the device-to-device variabilities of V_SET and V_RESET rise to 19.9% and 15.6%, respectively, when considering all 24 devices (Fig. 4). In addition, the device-to-device variabilities of HRS and LRS are 16.8% and 12.7%, respectively (Fig. S7). Note that the device- to-device variabilities of V_SET and V_RESET are 6.06% and 29.07%, respectively, for the CVD h-BN device reported recently^[20], indicating the uniformity of the present device is comparable to that of the h-BN device. Such excellent uniformity makes the MoTe₂ film promising for the construction of large-scale memristor arrays.

According to the estimation using the one-bit pull-up scheme (detailed results are shown in Fig. S8 and Fig. S9), the maximum array sizes with the 1R scheme and the 1S1R scheme are 4×4 and 870×870 (740 kb), respectively. Therefore, a 3×3 array was fabricated to verify the feasibility of the memristor array based on the MoTe₂ film. After an electroforming process, stable resistive switching was achieved in the MoTe₂ array device, as shown in Fig. 5(a-b). Notably, due to the inevitable issue of leakage current, the resistance values of the MoTe₂ array devices are lower than those of the independent MoTe₂ devices, especially for the HRS, leading to a smaller switching ratio (detailed results are presented in Fig. S10). These results demonstrate that the MoTe₂ film is promising for the construction of memristor array, and the array size can be further enlarged through combing with proper selectors.

Continuous pulse stimulations are applied on the device to mimic the long-term potentiation (LTP) and depression (LTD) of synapses, which are essential synaptic functions for neuromorphic computing. The conductance triggered by alternating 50 positive (1 V, 500 ns) and 50 negative (-1 V, 5 µs) input pulses exhibits repeatable and stable response of LTP and LTD of biological synapses (Fig. S11).

Fig. 6 presents one cycle of LTP and LTD realized in the present device. The LTP and LTD processes can be fitted by the equation below^[21-22]:

where G is conductance, N is the number of pulses, a, c and β are constants. Here, the exponential factor β can reflect the linearity of conductance modulation. The smaller the β, the better the linearities. As shown in Fig. 6, the β for LTP is 0.143 and the β for LTD is 0.203, which is comparable to the previously reported work^[21].

With the present device working as synapses, a fully connected network with one hidden layer has been simulated using the CrossSim platform^[23]. The neural network is with 784 input neurons, 300 hidden neurons, and 10 output neurons for 28×28 input pixels and 10 output classifications for recognition handwritten digits from Modified National Institute of Standards and Technology (MNIST) dataset. The MoTe₂ devices were used as storage of the weight in the network and the change of the conductance of the artificial synapses was adopted as the weight update in the process of the backpropagation algorithm. In addition, another network with the size of 64×36×10 was trained using another dataset of small digits with 8×8 pixels from the “Optical Recognition of Handwritten Digits” dataset. The test recognition accuracies of the simulation with two datasets using the present device are benchmarked with ideal floating-point numeric precision that represents the neuromorphic algorithm limit, as shown in Fig. 7. The recognition accuracies of the small and large digits can reach ~91.3% and 88.2% after 40 epochs, lower than the ideal numeric accuracies of ~96.7% and 98.1%. This accuracy difference between the experiment derived and the ideal numeric results from the nonlinear and asymmetrical conductance change in LTP and LTD processes, which can be further improved through interface engineering of the device.

The electron transport processes at LRS and HRS were analyzed to explain the underlying mechanism of resistive switching behavior. As shown in Fig. 8(a), nonlinear I-V characteristics are observed at the HRS, with the current increasing as the temperature increases. And it was found that the HRS was best-fitted by the Schottky emission model^[24] as shown in the inset of Fig. 8(a);

where A* is the effective Richardson constant, m₀ is the free electron mass, T is the absolute temperature, q is the electron charge, φ_B is the Schottky barrier height, E is the electric field across the dielectric, k is Boltzmann’s constant, ε₀ is the permittivity in vacuum, and ε_r is the optical dielectric constant.

In contrast, the LRS performs Ohmic conduction due to the linear characteristic of the I-V curve (Fig. 8(b)), indicating the formation/rupture of conductive filaments might be the dominating mechanism of the resistive switching. Furthermore, the current of the LRS decreases as the temperature increases, implying the metallic filaments are formed in the LRS. These metallic filaments might be composed of the monoclinic (1T′) phase (1T′-MoTe₂) resulting from phase transition of MoTe₂^[25] or metallic Ti filaments induced by Ti ions drifting into native defects in MoTe₂^[26]. The detailed atomic structure of these filaments need further investigations.

Through CVD growth of the MoTe₂ film, the PMMA transfer method and lift-off process, the memristive devices based on 2D MoTe₂ film were successfully prepared. The devices exhibit stable bipolar resistive switching with superior retention characteristics and good endurance. More importantly, the devices perform high yield, low cycle-to-cycle variability, and low device-to- device variability. Furthermore, a 3×3 memristor array based on the MoTe₂ device with 1R scheme was successfully demonstrated. And, the simulation of neural network with the prepared MoTe₂ devices as synapses was implemented for handwritten digits recognition, and the recognition accuracy of around 90% was realized. Our demonstration of memristor array based on centimeter-scale 2D MoTe₂ film provides an avenue for future neuromorphic circuits using large-scale 2D TMDs film.

Supporting materials related to this article can be found at https://doi.org/10.15541/jim20210658.

High-uniformity Memristor Arrays Based on Two-dimensional MoTe₂ for Neuromorphic Computing

HE Huikai¹, YANG Rui^2,3, XIA Jian^3,4, WANG Tingze^3,4, DONG Dequan^3,4, MIAO Xiangshui^2,3

(1. Nanhu Academy of Electronics and Information Technology, Jiaxing 314002, China; 2. Hubei Yangtze Memory Laboratories, Wuhan 430205, China; 3. Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China; 4. State Key Laboratory of Material Processing and Die & Mould Technology, School of Materials Science and Engineering, Huazhong University of Science and Technology, Wuhan 430074, China)

Before achieving a stable resistive switching, an electroforming process was required, as shown in Fig. S5. At the beginning, the current of the CVD-MoTe₂ device was low due to its high resistance. After the application of a relatively large positive voltage (about 1.15 V), the device switched to the LRS.

In case of memristor crossbar array, the cross talk between the adjacent memory cells restricts the maximum possible size of the array. Especially when all memory cells in the array are in low resistance state, the sneak path leakage problem will be highly predominant in the array. Therefore, to obtain the maximum possible crossbar array size, the worst case read scheme is utilized to measure the number of possible word lines with read margin of more than 10%, which is called the one-bit pull-up scheme^[1-3].

In this model, the bit line of the selected cell is biased to the read voltage, the word line of the selected cell is grounded and all the other word and bit lines are left floated. Regarding an N×N square crossbar array with the most challenging data pattern (i.e., all unselected cells in LRS) and negligible line resistance, the crossbar array can be simplified into three regions as shown in the left panel of Fig. S8(a). And the corresponding equivalent circuit is present in the right panel of Fig. S8(a). The resistance value of the selected cell will be found by measuring the output voltage across the pull up resistor, R_pu. To obtain the best result during the measurement, the pull up resistor value will be set to the resistance during the low resistance state (R_pu= R_LRS). The read margin normalized to the pull up voltage is calculated by solving the Krichhoff equation:

In order to suppress the leakage current, the memristor can be connected in series with the selector to form a 1S1R (one selector one resistor) structure. The Pt/TaO_x/ TiO₂/TaO_x selector reported before was chosen as the selector in combination with the CVD-MoTe₂ device to form 1S1R structure since it has an I-V window that matches the CVD-MoTe₂ device (Fig. S9)^[4]. The key resistance values ($R_{\text{LRS}}^{\text{select}}$, $R_{\text{HRS}}^{\text{select}}$, $\text{ }\!\!~\!\!\text{ }R_{\text{LRS}}^{\text{sneak}}$) and the corresponding maximum number of word lines/bit lines (N) with read margin >10% for 1R device and 1S1R schemes are listed in Table 1. Note that V_read is 2 V.

Fig. S8(b) shows the calculated read margin for both 1R and 1S1R schemes for different number of word lines. From this figure, it is clearly seen that the read margin reduced drastically for 1R scheme and the number of word lines with at least 10% read margin is found to be only 4. In case of 1S1R scheme, the non-linearity of the device resulted in increased number of word lines to 870 for 10% read margin, making a 740 kb possible crossbar array fabrication with good working possibility. Enhancing the selectivity of the selector can result in further increase of the crossbar array size to get a high density and large size crossbar array.

References:

[1] HUANG J J, TSENG Y M, HSU C W, et al. Bipolar nonlinear Ni/TiO₂/Ni selector for 1S1R crossbar array applications. IEEE Electron Device Letters, 2011, 32(10): 1427-1429.

[2] FLOCKE A, NOLL T G. Proceedings of the 33rd European Solid-State Circuits Conference (ESSCIRC, 2007), 2007: 328.

[3] LIU Z J. ZnO-based one diode-one resistor device structure for crossbar memory applications. Applied Physics Letters, 2012, 100(15): 041301.

[4] LEE W, PARK J, KIM S, et al. High current density and nonlinearity combination of selection device based on TaO_x/TiO₂/TaO_x, structure for one selector-one resistor arrays. ACS Nano, 2012, 6(9): 8166-8172.