Terahertz (THz) waves fall between millimeter waves and far-infrared waves in the electromagnetic spectrum, whose frequency range (0.1–10 THz) is the so-called terahertz gap due to the lack of effective generation and detection in this regime. Terahertz waves can penetrate numerous non-metallic and non-polar materials, which have specific spectral fingerprints for many substances, and offer strong water absorbency. Compared to mm-wave radiation, THz radiation can achieve higher spatial resolution. Unlike X-ray radiation^[1−4], THz radiation causes no harm to biological tissues. In addition, THz radiation can detect hidden objects compared to infrared radiation. Due to these unique characteristics, THz sensing and imaging have drawn particular attention in security screening^[5], biosensing^[6] and non-destructive testing (NDT) applications^[7−9].

Since plasma-wave theory^[10] was first proposed by the Dyakonov and Shur group in the early 1990s, research on silicon-based THz detectors and imagers has experienced tremendous progress, particularly in the sub-THz domain^[11−17] (frequency below 1 THz). However, the higher terahertz frequency range (>1 THz), providing a particular sought-after convenience in high-resolution imaging applications of industrial defect detection and chemical and biomedical sensing, remains to be further explored.

With the sustainable development of THz quantum cascade lasers (QCLs)^[18−21], the peak radiated power can reach 2 W with a single-mode 3 THz band^[20]. Such powerful THz QCLs can counteract heavy atmospheric absorption^{[22, 23]} and provide a feasible means for THz real-time imaging. The mainstream silicon-based CMOS process, which is easy to integrate, being low-cost and high-yield, is well appropriated by multipixel integration and CMOS image sensor (CIS) fabrication in the industry. To our knowledge, a significant number of CMOS terahertz detectors^[24−28] at frequencies above 1 THz depend on the aid of external commercial amplifiers and ADCs to process the analog output from a chip^[25−27] or integrate low-resolution in-pixel amplifiers^[28]. Unfortunately, most of them have poor sensitivity or complex systems, which dramatically hinders the development of compact and miniaturized CISs.

Here, we focus on terahertz detection and imaging with silicon devices in the standard 65 nm CMOS process. First, we explored detectors with various resonance frequencies and monitored a 3.0 THz QCL working in pulse mode. Then, we selected the optimal detector and implemented a fully integrated 3.0 THz CMOS image sensor in a monolithic chip for real-time imaging. An optimal responsivity (Rv) of 423 V/W and a minimum integral noise equivalent power (NEP) of 5.4 nW in video mode were reported. In experimental tests, the imaging speed rate reached 319 fps under CW illumination of the 3.0 THz QCL. This exploration shows that our CIS has promising potential in commercial THz imaging and industrial detection. This paper is organized as follows: Section 2 describes the detection mechanism, detector implementation and characterization. Section 3 assesses the proposed high-speed 3.0 THz CIS, followed by a conclusion in Section 4.

Since the Dyaknov and Shur group^[10] proposed the potential of plasma-wave-induced rectification in field-effect transistors (FETs), there has been prime interest in using FETs for DC power detection^[29−33] in recent years. At low frequencies, square-law power detection can be described as a typical quasistatic (QS) resistive mixing procedure. The DC current response I_det or DC voltage response V_det extracted can be expressed as

1Idet=μCox⋅(W/L)⋅Va24,

or

2Vdet=Va24⋅(Vgs−VTH),

where W/L refers to the aspect ratio of the FET, µ is the carrier mobility, C_ox is the oxide capacitance per unit area, V_a is the amplitude of the received THz signal, V_gs is the gate-to-source voltage, and V_TH is the threshold voltage.

However, in the THz frequency range well above the cutoff frequency of an FET, the above low-frequency approximation is no longer active, and a nonquasistatic (NQS) description could be a substitute. The FET power detection mechanism in the THz frequency range is summarized as an NQS RC ladder model (shown in Fig. 1(a)). At higher frequencies (i.e., 3.0 THz), the FET motion at a specific position x acts in a nonresonant manner. It can be defined as the following simplified classic Euler equation of action and the continuity equation^{[29, 33]}:

3v(x,t)τ+em∂U(x,t)∂x=0,

4∂U(x,t)∂t+∂(U(x,t)⋅v(x,t))∂x=0,

where v(x, t) is the local drift electron velocity in the channel and U(x, t) is the electrical potential along the channel. τ is the momentum relaxation time, τ = µm/e, e is the elementary charge, and m is the effective transport mass. The boundary condition of the FET is as follows:

5U(0,t)=(Vgs−VTH)+Vacosωt,

6J(L,t)=0,

with radiated THz frequency ω, current density per width length J(x, t), location in channel x, and time t. The current density determines the local drift velocity:

7J(x,t)=ne⋅v(x,t),

where the unified electron concentration n is related to the local gate-to-source voltage and subthreshold ideality factor η:

8n=CoxηVTHe⋅ln(1+12exp((Vgs−VTH)/ηVTH)).

For V_a≪ (V_gs − V_TH), a DC potential could be extracted from the drain terminal according to Eqs. (3)–(8).

Fig. 1(b) shows a 3.0 THz numerical solution of the position-dependent gate-to-channel voltage U(x,t) in the NQS regime in a 65 nm NMOS device. Suppose a bias V_gs – V_th = 0.1 V, a carrier mobility of 0.035 m²/(V∙s) and a received signal amplitude V_a = 1 mV. The time-harmonic THz radiation signal V_a∙cos(ωt) propagates through the channel and decays over a distance to zero before reaching the drain contact. For comparison purposes, Fig. 1(c) exhibits the numerical solution for 30 GHz. Unlike the 3.0 THz FET, the whole FET at 30 GHz can be regarded as a lumped element, and its motion acts in a quasistatic (QS) manner.

It is evident that effective plasma oscillation in the higher THz frequency band occurs near the FET source, while the remaining source–drain channel is considered to have parasitic distributed capacitances and resistances. A short channel device is usually adopted to weaken the inner parasitic part to obtain a THz-detecting unit with lower thermal noise and better responsivity.

To facilitate the evaluation of individual power detectors, we arranged 12 × 9 detectors in a monolithic chip where the resonant frequency of the detectors spans from 2.0 to 3.3 THz. Fig. 2 shows a micrograph of the wire-bonded CMOS terahertz detectors with 120 × 80 µm² per pitch. Each detector is equipped with a half-wavelength single-end patch antenna coupled to a FET-based NMOS device. To suppress the antenna coupling effect, the space between adjacent antenna planes is 60 µm from one to another.

The detector model using the standard 65 nm CMOS 1P9M process is illustrated in Fig. 3. The patch antenna transmits the received terahertz signal to the source of a common-gate NMOS device through the microstrip line TL1 along with the via layers. When an external gate bias voltage V_g is applied, the coupled drain terminal will read out a DC signal U_d proportional to the received terahertz energy.

In this work, we select top metal M9 as the patch plane and M1 as the ground plane. There are two via layers. One joint is the center of the patch plane to the ground plane, providing a DC path and minimizing the substrate incurred losses. The other and TL1 serve as a matching network (MN) that matches the patch antenna and NMOS device. The notch filter (NF) is inserted into the gate terminal to filter the parasitic influences of the external power supply. The NMOS device, with a 120 nm channel length and a 60 nm gate width, is selected for better responsivity values. By adjusting the size of the patch plane and TL1, we can obtain various detectors with different resonant frequencies. No amplifiers or other components are employed to avoid additional noise.

We prepare a current-controlled pulse QCL to generate a 3.0 THz frequency signal. Fig. 4 illustrates the QCL radiated power as a function of the current. When an 8 A current pulse drives the QCL with a 1% duty cycle, its radiation power is up to 1.1 mW. The measured QCL power exhibits an approximately linear dependence on currents. Meanwhile, our detector D14 indicates the detected voltage response under various drive currents (shown in Fig. 5). As the QCL current increases, the radiated frequency slightly deviates from 3.0 THz, thus yielding a variable gate bias to obtain an optimal response. While the QCL is operated at 8 A, the voltage response cannot keep up with the increased QCL power, and the detector tends to be saturated.

We adopt classic lock-in techniques^{[24, 25]} to measure the voltage and noise response. The measured results for voltage responses of three different detectors versus gate bias are plotted in Fig. 6. A laser diode/temperature controller (Thorlabs. ITC4020)^[34] provides a 5 kHz, 1% duty cycle pulse signal to the 3.0 THz QCL source. Maximum voltage responses are obtained in the subthreshold region where the noise responses are also remarkable, as shown in Fig. 7. The bias partly dictates the detector’s signal-to-noise ratio (SNR).

QCLs are the most popular THz emission sources at higher THz frequencies beyond 3 THz. They are powerful and narrow-band, providing an opportunity for THz detection and imaging but also a challenge for electronics and electromagnetic design in this band. Most often, resonant frequencies of the actual fabricated antenna-coupled detectors deviate from the original designs. It is essential to achieve the optimal detector to better monitor the THz QCL and fabrication for our further 3.0 THz multipixel CIS.

Table 1 summarizes the parameters and measured results of nine different detectors for monitoring the 3.0 THz QCL described above. Apparently, at higher frequencies, the physical length of an antenna differs from its theoretical electrical length in our design. Moreover, the detector is sensitive to patch scaling and microstrip TL1. D13, D14, D15 and D16 have the same patch size but varying TL1. Their resonant frequencies are 2.85, 2.94, 3.04 and 3.25 THz, respectively. D95 and D72 have the same TL1 size, while their patch sizes are slightly different, creating a 150 GHz resonant frequency difference. Interestingly, we find that D15 and D72 have different patch sizes and TL1 sizes but have the same resonant frequency. Moreover, D72, which has higher directivity, yields a higher voltage response.

In this section, D55 achieves an optimal 4.15 mV voltage response and an outstanding 3.79 dBi directivity value. Therefore, we chose D55 for our follow-up 3.0 THz CIS design.

Its favorable resolution (i.e., 50 µm at 3.0 THz) would benefit industrial defect detection and biomedical imaging. However, raster-scan imaging using a single CMOS detector takes a long time. Our team’s leaf-scanned image in Ref. [25] requires approximately 2 h, which is undesirable in the industrial market. If possible, a multipixel THz CMOS image sensor for real-time imaging should be developed.

In this contribution, we will discuss a fully compact CIS that integrates a pixel array including 1024 antenna-coupled detectors, digital readout processing (DRP)^[29] modules, and a digital logic control (DLC) module into an on-chip system. With the illumination of a CW 3.0 THz QCL, the CIS demonstrates real-time imaging capability and achieves a high-speed rate of 319 fps.

Our CIS employs the high-parallelism readout processing architecture^{[15, 29, 35, 36]} to effectively and quickly process and read out the detector responses. Fig. 8 shows the block diagram of the CIS. The pixel array operates in rolling-shutter mode and outputs the DC detected signals (one full 32-pixel row) row by row. The 32-column analog outputs are concurrently processed by DRPs and then converted to a digital bit stream for off-chip FPGA processing. The DLC module drives the row-select inputs.

The designed detector is D55, selected from Section 2. Fig. 9(a) displays the schematic of a single-pixel circuit. It mainly consists of a half-wavelength single-end patch antenna, a matching network MN, a detecting NMOS device M1, a notch filter NF and an additional transistor switches M_SEL. One row-select line controls 32-column pixels by switches (M_SEL), while the column bus reads out the detected outputs synchronously.

The ground plane of the pixel layout in Fig. 9(b) occupies a 50 × 50 µm² area that violates design rule checking (DRC) due to unreleased stress. Moreover, no other metals exist between the patch and ground planes, thus introducing metal density issues. Those omitted design rules may inevitably influence the yield of the fabricated detector array. To address these issues, 10 µm-wide metal layers are stacked around the ground plane for stress release; slots are employed for metal density requirements.

The CIS structures a monolithic system that fully integrates the 1024 pixels and DRP modules. It is fabricated in 65 nm standard CMOS technology on a 2.81 × 5.39 mm² silicon die (see Fig. 10). The pixel array occupies a 1.92 × 1.92 mm² area with a single pitch of 60 × 60 µm². At the same time, one readout process module possesses a 1.92 × 1.36 mm² area. All circuits operate under 1.2 V. At the same time, the printed circuit board (PCB) bonds our sensor and connects off-chip FPGA for a compact experimental system.

Fig. 11 illustrates the measurement setup for CIS characterization. All are measured under the CW illumination of a 3.0 THz QCL. The THz frequency power generated by the QCL is focused and collimated to the pixel array via two TPX lenses. Subsequently, the detected signal is converted to a digital signal and sent to an off-chip FPGA for processing. The CIS is placed slightly out-of-focus to capture a more homogeneous source beam.

Typically, the single-pixel responsivity can be calculated via the pixel response U_out divided by the power incident to the on-chip pixel P_in^{[24, 37]}

9Rv,s=UoutPin=γ⋅∑i=11024Ui⋅ApixPbeam⋅Aeff,

where U_i is the output value of the i_th pixel, γ is the response-relevant constant, with a measured value of 1.3, P_beam is the available source beam power in the pixel plane, A_pix is the physical area of a single pixel, A_eff is the effective area of a single pixel, which is determined by A_eff = Dλ²/4π, and D is the simulated directivity of the antenna.

In regard to the responsivity of pixel arrays, the calculated effective area is no longer reliable since pixels are subdiffraction-limited and pitch-fixed. We define the effective area A_eff as equal to the physical area A_pix. Therefore, the CIS responsivity in the video-rate mode can be determined by normalizing the sum of the detector responses in the pixel array area to the available source beam power P_beam. Fig. 12 shows the acquired image of the measured focused 3.0 THz spot. A beam power of 5 mW is measured by a free-space absolute power meter (from 3A-P-THz). The normalized voltage responsivity R_v of the CIS can be expressed as^{[12, 14]}

10Rv=∑i=11024Ui/Pbeam.

Fig. 13 exhibits the bias dependence of the single-pixel responsivity and CIS responsivity, respectively. Owing to the inhomogeneity between pixels and the effective electrical area A_eff, our CIS achieves a video-mode responsivity value of 423 V/W at 0.15 V and a single-pixel-mode responsivity of 701 V/W at 0.15 V.

In addition, we find that the single-pixel responsivity differs from the responsivity of D55 in Section 2. The different testing QCLs and different pixel pitches mainly cause this difference.

Unlike the traditional definition of a CIS-detector NEP^{[14, 38, 39]}, we use the ratio of the root-mean-square (RMS) noise voltage U_noise to the voltage responsivity R_v as the CIS’s noise figure-of-merit (FOM)^{[12, 40]}. That is,

11NEP=UnoiseRv.

By sampling 67 frames, we calculate the standard deviation for each pixel corresponding to the RMS noise. Under the experimental tests, a minimum integral NEP of 5.4 nW at 0.25 V is obtained, as shown in the blue curve in Fig. 14.

The signal readout strategy is to perform CIS integration in rolling-shutter mode. During the row-exposure periods, the readout chains will continuously sample the output. The higher the frame rate is, the richer the acquired information, but the lower the SNR. One can lower the required samplings per frame to achieve a higher frame rate. Fig. 15 lists nine different captured source beams of various frame rates. The CIS is placed slightly out-of-focus to exhibit more diffraction rings for better comparison. Our CIS reaches a high speed of up to 319 fps with a still distinguishable image.

A performance comparison between this work and other reported THz CMOS imagers is presented in Table 2. Compared to other implementations, our CIS has a smaller pixel pitch size, better responsivity and higher speed. In addition, no optical elements or external auxiliary devices are integrated into our CIS, which is compatible with low-cost industrial multipixel THz CMOS camera fabrication.

In summary, we explored a promising route for high-speed 3.0 THz imaging. After studies on multiple detectors with different resonant frequencies for monitoring a 3.0 THz QCL, we fabricate a high-speed 3.0 THz CIS that fully integrates the monolithic pixel array and on-chip DRPs in the 65 nm CMOS process. The CIS achieves a voltage responsivity of 423 V/W and an integral NEP of 5.4 nW in video mode at room temperature. Meanwhile, our chip realizes a favorable framerate up to 319 fps. Our CIS is expected to promote further development of large-scale pixel CIS and compact THz imaging systems.