[1] J. A. Kalomiros and J. Lygouras, “Design and evaluation of a hardware-software FPGA-based system for fast image processing,” Microprocessors and Microsystems, 2008, 32(2): 95-106.
[2] B. M. Miller and E. Y. Rubinovich, “Image motion compensation at charge-coupled device photographing in delay-integration mode,” Automation and Remote Control, 2007, 7(1): 45-54.
[3] E. Miyata, C. Natsukar, and D. Akutsu, “Fast and flexible CCD-driver system using fast DAC and FPGA,” Nuclear Instruments and Methods in Physics Research A, 2001, 459(1-2): 157-164.
[4] H. M. Wey and W. Guggenbuhl, “An improved correlated double sampling circuit for low noise charge-coupled devices,” IEEE Transactions on Circuits and Systems, 1990, 37(12): 1559-1565.
[5] M. A. Vega-Rodriguez, J. M. Sanchez-Perez, and J. A. Gomez-Pulido, “Real time image processing with reconfigurable hardware,” The 8th IEEE International Conference on Electronics, Circuits and Systems, 2001, 1: 213-216.
[6] G. E. Healey and R. Kondepudy, “Radiometric CCD camera calibration and noise estimation,” IEEE Transactions on Pattern Analysis and Machine Intelligence, 2005, 16(3): 267-276.
[7] H. Faraji and W. J. MacLean, “CCD noise removal in digital images,” IEEE Transactions on Imaging Processing, 2006, 15(9): 2676-2685.
