[1] LIU C O, BERKOVICH A, CHEN S, et al. Intelligent vision systems - bringing human-machine interface to AR/VR ［C］ // IEEE IEDM. San Francisco, CA, USA. 2019: 209-218.
[2] MEAD C. Neuromorphic electronic systems ［J］. IEEE Proceed, 1990, 78(10): 1629-1636.
[4] HASLER P. Low-power programmable signal processing ［C］ // IEEE Int Database Engineer & Appl Symp. Banff, Canada. 2005: 1-6.
[5] DE SILVA U, MANDALY S, MADANAYAKE A, et al. RF-rate hybrid CNN accelerator based on analog-CMOS and Xilinx RF SoC ［C］ // IEEE ISCAS. Seville, Spain. 2020: 1-5.
[6] DIORIO C, HASLER P, MINCH B A, et al, Single-transistor silicon synapse ［J］. IEEE Trans Elec Dev, 1996, 43(11): 1972-1980.
[7] ZHONG Q, WOOYEOL C, KIM D Y, et al.CMOS terahertz receivers ［C］ // Proc IEEE CICC. San Diego, CA, USA. 2018: 1-8.
[8] RODWELL M. HBT THz integrated circuits and applications ［R］. San Jose: SRC Workshop on New Trajectories for Analog Electronics, IBM Almaden Research Center, 2019.
[9] HASLER J. Large-scale field programmable analog arrays ［J］. IEEE Proceed, 2020, 108(8): 1283-1302.
[10] WATSON B C, SHOOP B L, RESSLER E K, et al. Analog to digital conversion using single-layer integrate-and-fire networks with inhibitory connections ［J］. EURASIP J Advan Signal Process, 2004(13): 2066-2075.
[11] XU Y, THAKUR C S, HAMILTON T J. A reconfigurable mixed-signal implementation of a neuromorphic ADC ［C］ // IEEE BioCAS. Atlanta, GA, USA. 2015: 7348415.
[12] STRACHAN J P. Perspective on designing and demonstrating hybrid analog-digital hardware ［R］. San Jose: SRC Workshop on New Trajectories for Analog Electronics, IBM Almaden Research Center, 2019.
[13] MAHMOODI M R, STRUKOV D B. An ultra low energy internally analog, externally digital vector-matrix multiplier circuit based on NOR flash memory technology ［C］ // 55th ACM/ESDA/IEEE DAC. San Francisco, CA, USA. 2018: 8465804.
[14] AHMAD Z, CHIO W, SHARMA N, et al. Devices and circuits in CMOS for THz applications ［C］ // Proc IEEE IEDM. San Francisco, CA, USA. 2017: 734-737.
