• Microelectronics
  • Vol. 51, Issue 4, 582 (2021)
WANG Fengjuan1, CHEN Jiajun1, WAN Hui2, GAO Weiqi2, YU Ningmei1, and YANG Yuan1
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.200474 Cite this Article
    WANG Fengjuan, CHEN Jiajun, WAN Hui, GAO Weiqi, YU Ningmei, YANG Yuan. A Cumulative NMOS Varactor Diode for Three-Dimensional IC[J]. Microelectronics, 2021, 51(4): 582 Copy Citation Text show less

    Abstract

    Based on TSV technology, a cumulative NMOS varactor diode applied to three-dimensional integrated circuits was proposed. Compared with the conventional cumulative NMOS varactor, the TSV-based cumulative NMOS varactor had the advantages of high capacitance density and high integration. The impacts of TSV height, TSV diameter, junction depth and width of source region and drain region on the performances of the proposed varactor diode were analyzed. The results showed that the capacitance density could be increased by increasing the TSV height or TSV diameter. The voltage sensitivity could be improved by reducing the junction depth of the source region and drain region. And by increasing the width of the source region and drain region, the inhibition ability of electron generation by the hole in the channel could be improved. An analytic model was added to the above comparison. Finally, the fabrication process of the varactor diode was given.
    WANG Fengjuan, CHEN Jiajun, WAN Hui, GAO Weiqi, YU Ningmei, YANG Yuan. A Cumulative NMOS Varactor Diode for Three-Dimensional IC[J]. Microelectronics, 2021, 51(4): 582
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