Over the past decade, there continues to be an increased demand for high bandwidth density optical interconnects for growing mega data centers, long-haul telecommunications, and peta/exa-scale high-performance computing. Some studies suggest annual global data center IP traffic will reach 20.6 zettabytes by the end of 2021; 94% of those workloads will be processed by cloud data centers and 6% by traditional data centers [1]. The majority of this IP traffic comes from video streaming services, and machine-learning applications [2]. With the advent of the Internet-of-Things, machine-to-machine connections via home applications and connected cars are expected to have a 30% compound annual growth rate over a forecast period from 2018 to 2023, connecting half of global devices [3]. To accommodate the exponential growth in data traffic, the trend has been to scale mega-data centers with hundreds of thousands of servers, which underscores the concern for data center power consumption given increased ecological concerns and future environmental impact [2,4]. In fact, by 2030, it is estimated that 8%–20.9% of global power consumption will be from data centers [5]. Therefore, future data center interconnects will need to support higher bandwidths at reduced energy dissipation (energy/bit) at a cost that economically scales.

Silicon photonics is a promising technology that aims to reduce system-level power consumption to a few or sub-picojoule/bit, increase aggregate bandwidth to multiple terabytes/second, and lower manufacturing costs by leveraging well-established complementary metal oxide semiconductor technologies. A major advantage of silicon photonics lies in dense integration capacity to conveniently enable advanced technology, such as dense wavelength-division multiplexing (DWDM) where many parallel channels of wavelengths can be multiplexed onto a single fiber for massive aggregate bandwidth. At Hewlett Packard Labs, a novel DWDM architecture to drastically reduce chip power consumption ($<1.5\mathrm{pJ}/\mathrm{bit}$), while simultaneously increasing transmission bandwidth ($>1\mathrm{Tbit}/\mathrm{s}$), has been proposed [6]. A heterogeneous III–V/Si platform is being developed to enable such a DWDM transceiver. Within this platform, optical (de-)interleaving is an important functionality for realizing high-bandwidth DWDM systems with our heterogeneous optical frequency comb (OFC) sources [6–10], semiconductor optical amplifiers (SOAs) [11], and micro-ring modulators [12,13]. Typically, micro-ring resonators (MRRs) are cascaded onto a single common bus waveguide; however, there is a practical limit to the number of MRRs that can be used in this architecture. This is due to cross talk (XT), off-resonance insertion loss (IL), and the free spectral range (FSR) limitation of MRRs at the expense of smaller ring radius size, as well as control complexity [14–16]. On-chip (de-)interleavers address this issue by splitting every other OFC wavelength onto a separate spatial bus waveguide such that each spatial bus links a half number of the MRRs, but with the channel spacing doubled. The channel spacing is chosen to be 65 GHz because it was found in DWDM applications to suffer from moderate power penalty for modulation at 10 Gbit/s [17]. Multiple stages of (de-)interleaving can further extend the channel spacing if necessary. Current state-of-the-art silicon photonic (de-)interleavers use either power inefficient thermal [18,19] or current injection phase shifters to compensate for either waveguide phase errors, power splitting errors, or temperature drift. In this paper, we demonstrate the use of a heterogeneously integrated III–V/Si metal-oxide-semiconductor capacitor (MOSCAP) structure to efficiently tune the phase errors in various (de-)interleavers such that channel XT is reduced. In this case, we aim to (de-)interleave an OFC source (comb laser A) with 65 GHz channel spacing, as illustrated in Fig. 1 [6]. We have designed and fabricated various (de-)interleaver architectures such as second/third asymmetric Mach–Zehnder interferometers (AMZIs); one-, two-, three-ring-assisted AMZIs (RAMZIs); and cascaded second-order ring filters on the same heterogeneous III–V/Si chip. Each design has advantages/disadvantages in terms of flatness of passband, passband roll-off, and IL. These designs should address three main desired requirements of (de-)interleavers: (1) low IL such that the optical power budget is minimized, (2) passband widths are wide enough to accommodate OFC drift and temperature fluctuation such that minimal wavelength tuning is required, and (3) there is a way to efficiently correct for fabrication imperfections which are an issue for high-index platforms such as silicon photonics. The use of heterogeneously integrated MOSCAP (de-)interleavers not only addresses these three issues, but also allows for convenient integration of low-power OFC sources [7], SOAs [11], modulators [12,13], and photodetectors [6,20–23], all with identical III–V/Si material stack and coherent fabrication flow. In addition, the ultra-energy-efficient MOSCAP (de-)interleavers presented here offer a building block that will benefit a wide range of applications such as DWDM/CWDM (de-)multiplexers [24–30], programmable photonics [31–36], RF photonics [37,38], and optical neural networks [39,40].

In this paper, we demonstrate various second/third-order MOSCAP AMZI and one-, two-, three-ring-assisted MOSCAP AMZI (de-)interleavers operating at O-band wavelengths with 65 GHz channel spacing. The second/third-order AMZI (de-)interleavers show channel XT of $-22$ to $-15\mathrm{dB}$ and $-32$ to $-22\mathrm{dB}$, respectively, with an associated power consumption of 83.0 and 53.0 nW. The power consumption for the second-order MOSCAP AMZI is $2.77\times {10}^5$ smaller than that of a similar AMZI-based interleaver using thermal re-configuration [18]. The one-, two-, three-ring-assisted AMZI (de-)interleavers exhibit channel XT of $-27$ to $-16\mathrm{dB}$, $-22$ to $-21\mathrm{dB}$, and $-20$ to $-18\mathrm{dB}$, respectively, with associated power consumption of 10.0, 7220.0, and 33.6 nW. The power consumption for the one-ring-assisted MOSCAP AMZI is $2.55\times {10}^6$ smaller than that of other similar reported (de-)interleavers with thermal tuning [19]. To the best of our knowledge, we have demonstrated for the first time, III–V/Si MOSCAP (de-)interleavers with the lowest XT and reconfiguration power consumption. Such an athermal phase tuning process results in zero thermal XT to adjacent devices, e.g.,  micro-ring modulators, and facilitates dense integration. Table 1 shows a list of current state-of-the-art silicon-based (de-)interleavers, their performance, and the work presented in this paper. A comparison of different material systems (silica, silicon nitride) was not made due to several reasons: (1) these devices are significantly larger in footprint; (2) difficulty with active device integration; and (3) significantly larger power consumption when aligning to OFC spectra. The designs in this work can be adapted for C-band wavelengths (${\lambda }_0=1550\mathrm{nm}$) with $\sim 1.4\times \text{phase tuning\hspace{0.17em}efficiency}$, but with the cost of an equally incurred factor of optical loss. This will be discussed in Section 2.Table 1.

Complete Survey of State-of-the-Art DWDM Si (De-)interleavers

For silicon photonic filters, it is critical to understand the process variability on device performance which eventually affects electrical power consumption from the choice of phase tuning. Phase-sensitive devices such as arrayed waveguide gratings (AWGs), lattice filters, and (de-)interleavers can be sensitive to phase errors and are dependent on waveguide width, thickness, and refractive index non-homogeneity. The change in resonant wavelength can be determined by the following equation: $\mathrm{\Delta }{\lambda }_0=({\lambda }_0/n_g)\sqrt{{[(\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}w)·\mathrm{\Delta }w]}^2+{[(\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t)·\mathrm{\Delta }t]}^2}$, where ${\lambda }_0$, $n_{\mathrm{eff}}$, $n_g$, $\mathrm{\Delta }w$, and $\mathrm{\Delta }t$ are the free-space wavelength, effective index, group index, width variation, and thickness variation, respectively. By taking into account the group index defined as $n_g=n_{\mathrm{eff}}-{\lambda }_0·\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}\lambda$, the resonant wavelength shift for each dimensional variation can be calculated by the following: $\mathrm{\Delta }{\lambda }_0/\mathrm{\Delta }w=({\lambda }_0/n_g)(\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}w)$ and $\mathrm{\Delta }{\lambda }_0/\mathrm{\Delta }t=({\lambda }_0/n_g)(\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t)$. In Figs. 2(a) and 2(b), the effective index and group index are plotted, and it can be observed these two parameters monotonically increase as waveguide dimensions increase because modal confinement becomes larger within the silicon material. Figures 2(c) and 2(d) show that width sensitivity ($\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}w$) and thickness sensitivity ($\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t$) of the effective index are decoupled when the width $>500\mathrm{nm}$ and thickness $>300\mathrm{nm}$ for ${\lambda }_0=1310\mathrm{nm}$. Throughout this paper, single-mode silicon rib waveguides are used and have design dimensions of $\text{height}=300\mathrm{nm}$, $\text{width}=500\mathrm{nm}$, and $\text{etch depth}(\mathrm{ED})=170\mathrm{nm}$, thus resulting in effective index variations of $\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}w=5.974\times {10}^{-4}{\mathrm{nm}}^{-1}$ and $\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t=1.338\times {10}^{-3}{\mathrm{nm}}^{-1}$. As a result, the most critical parameter in controlling phase errors is the starting wafer thickness uniformity. The wavelength shift variation also follows the same trend with $\mathrm{\Delta }{\lambda }_0/\mathrm{d}w=0.1968\mathrm{nm}/\mathrm{nm}$ and $\mathrm{\Delta }{\lambda }_0/\mathrm{d}t=0.4418\mathrm{nm}/\mathrm{nm}$, as shown in Figs. 2(e) and 2(f). Use of thicker waveguides will significantly reduce the effective index variation due to silicon thickness variations ($\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t$); however, to maintain single-mode operation, the width will have to be narrower, which works against lowering overall dimensional sensitivity and becomes more sensitive to waveguide sidewall roughness. In fact, the silicon waveguide dimensions used throughout this paper offer the best design trade-off in terms of low $\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}w$ and $\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t$ while maintaining single-mode operation. In the design section, we will show how local width variations from $\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t$ can significantly affect passband XT.

In order to correct for phase errors due to silicon waveguide non-uniformity ($\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}w$, $\mathrm{d}{n}_{\mathrm{eff}}/\mathrm{d}t$), we explored the use of ultra-power-efficient MOSCAP phase tuners based on a GaAs/dielectric/Si heterogeneous structure, as shown in Figs. 3(a)–3(c). There exists a number of high-$k$ dielectrics [47] such as ${\mathrm{Ta}}_2{\mathrm{O}}_5$ ($k\sim 22$), ${\mathrm{TiO}}_2$ ($k\sim 80$), ${\text{SrTiO}}_3$ ($k\sim 2000$), and ${\mathrm{ZrO}}_2$ ($k\sim 25$), to name a few; however, we focused on ${\mathrm{Al}}_2{\mathrm{O}}_3$ ($k\sim 9$) and ${\mathrm{HfO}}_2$ ($k\sim 25$) here due to well-studied property and availability of the in-house fabrication. Between these two, ${\mathrm{HfO}}_2$ should exhibit 2–3 times the capacitance of ${\mathrm{Al}}_2{\mathrm{O}}_3$ for the same given area and dielectric thickness. In order to determine the effective optical phase shift due to electron and hole induced effects, we simulated the heterogeneous MOSCAP structure which takes into account the free-carrier absorption (FCA), plasma dispersion, and bandgap shrinkage. The change in material index $\mathrm{\Delta }n$ and FCA $\mathrm{\Delta }\alpha$ due to voltage-dependent plasma dispersion effect can be described by the classic Drude model [10,48]. The associated index and FCA values are directly proportional to the square of the operating wavelength and thus at C-band wavelengths (${\lambda }_0=1550\mathrm{nm}$), $\mathrm{\Delta }n$ and $\mathrm{\Delta }\alpha$ should increase by $\sim 1.4\times$ compared to O-band wavelengths (${\lambda }_0=1310\mathrm{nm}$). Due to $\sim 4\times$ smaller electron effective mass and $\sim 6\times$ larger electron mobility of GaAs ($m_e^{*}=0.063m_0$, ${\mu }_e=8500{\mathrm{cm}}^2·{\mathrm{V}}^{-1}·{\mathrm{s}}^{-1}$) than that of crystalline Si ($m_e^{*}=0.28m_0$, ${\mu }_e=1400{\mathrm{cm}}^2·{\mathrm{V}}^{-1}·{\mathrm{s}}^{-1}$), the plasma dispersion effect on index change in n-type GaAs is more efficient with lower FCA losses. The similarity in hole parameters for these materials is quite similar in terms of index change; the fact that GaAs hole-induced inter-valence band absorption is larger than that of Si also precludes the use of p-GaAs [10]. In addition, the effects of optical phase shifts from Si free-carrier holes are larger than from electrons which make the choice of using p-Si a convenient one [48]. InP ($m_e^{*}=0.07m_0$, ${\mu }_e=5400{\mathrm{cm}}^2·{\mathrm{V}}^{-1}·{\mathrm{s}}^{-1}$) is another III–V choice; however, GaAs performs better in terms of FCA losses and slightly better for $\mathrm{\Delta }n$ change. These design choices align with conventional heterogeneous III–V/Si active device (laser, amplifier, and photodetector) structures where the III–V p-i-n layer stack is positioned from top to bottom after wafer bonding, such that the n-layer serves as the diode cathode terminal and MOSCAP gate layer simultaneously. Our recent strategic change from previous InP/InAlGaAs-based quantum well lasers/amplifiers to GaAs/InAs-based quantum-dot (QD) is another pleasant coincidence for improved phase tuning and lower FCA losses. As a result, there is no need to alter the conventional III–V epitaxial structure and fabrication process to integrate highly efficient MOSCAP in our heterogeneous GaAs/Si QD-powered platform.

Our single-mode waveguide structure is defined by a width, height, and etch depth of 500, 300, and 170 nm, respectively, as indicated in Fig. 3(a). The wafer-bonded III–V region is primarily 190 nm thick and n-GaAs doped at $3\times {10}^{18}{\mathrm{cm}}^{-3}$. Figures 4(a) and 4(b) show the simulated transverse electric (TE) effective index change ($\mathrm{\Delta }{n}_{\mathrm{TE}00}$) and the associated FCA optical losses for both $\mathrm{n}\text{−}\mathrm{GaAs}/{\mathrm{Al}}_2{\mathrm{O}}_3/\mathrm{p}\text{−}\mathrm{Si}$ and $\mathrm{n}\text{−}\mathrm{GaAs}/{\mathrm{HfO}}_2/\mathrm{p}-\mathrm{Si}$ structures for various values of dielectric thicknesses at a forward bias. Assuming a 5 nm thick ${\mathrm{Al}}_2{\mathrm{O}}_3$ with a refractive index of $n_{{\mathrm{Al}}_2{\mathrm{O}}_3}=1.75$, the calculated optical confinement factors are ${\mathrm{\Gamma }}_{{\mathrm{Al}}_2{\mathrm{O}}_3}=1.15\%$ and ${\mathrm{\Gamma }}_{\mathrm{III}-\mathrm{V}}=28.2\%$ with an overall effective index of $n_{\mathrm{eff}}=3.1144$. A 5 nm thick ${\mathrm{HfO}}_2$ with a refractive index of $n_{{\mathrm{HfO}}_2}=1.88$ has optical confinements of ${\mathrm{\Gamma }}_{{\mathrm{HfO}}_2}=1.15\%$ and ${\mathrm{\Gamma }}_{\mathrm{III}-\mathrm{V}}=28.3\%$ with an overall effective index of $n_{\mathrm{eff}}=3.1154$. In forward bias, the MOSCAP structure operates in accumulation mode to achieve maximal plasma dispersion effect over other modes. If we assume a length of $L=500\mathrm{\mu m}$, wavelength of $\lambda =1.31\mathrm{\mu m}$, and an ${\mathrm{Al}}_2{\mathrm{O}}_3$ thickness of 5, 10, 15 nm, the corresponding static $V_{\pi }L=0.13$, 0.21, 0.29 V·cm, respectively, based on $\mathrm{\Delta }\phi =2\pi \mathrm{\Delta }{n}_{\mathrm{TE}00}L/\lambda$, where $\mathrm{\Delta }\phi$ is the phase change from MOSCAP carrier-dependent index $\mathrm{\Delta }{n}_{\mathrm{TE}00}$. For a high-$k$-dielectric such as ${\mathrm{HfO}}_2$, a thickness of 5, 10, 15 nm corresponds to a static $V_{\pi }L=0.09$, 0.12, 0.16 V·cm, considerably more efficient than ${\mathrm{Al}}_2{\mathrm{O}}_3$. In both structures, a thinner dielectric thickness yields increased phase tuning efficiency at the expense of increased FCA and fabrication challenge to maintain a negligible leakage current.

It is well known that $N$th-order AMZI (de-)interleavers have been shown to have low loss and a flat-top filtering response [49]. There have been a few variations on the SOI (silicon-on-insulator) platform, particularly at the 1550 nm wavelength bands [44,45], with channel spacing range of 56–1875 GHz and channel XT down to $-22\mathrm{dB}$ with thermal tuning [18]. An $N$th-order (de-)interleaver consists of $N$ differential path lengths and $N+1$ power splitters. The $N$th-order AMZI (de-)interleavers are modeled with a transfer matrix model where a single MZI is defined as ${\mathrm{\Phi }}_{\mathrm{MZI}}={\mathrm{\Phi }}_{\mathrm{cplr}}({\kappa }_2){\mathrm{\Phi }}_{\mathrm{delay}}{\mathrm{\Phi }}_{\mathrm{cplr}}({\kappa }_1)$, where [49] $${\mathrm{\Phi }}_{\mathrm{MZI}}=\left[\begin{array}{cc}{c}_1(\lambda )& -j{s}_1(\lambda )\\ -j{s}_1(\lambda )& c_1(\lambda )\end{array}\right]\left[\begin{array}{cc}{e}^{-j2\pi n_g(\lambda )\mathrm{\Delta }{L}_1/\lambda }& 0\\ 0& 1\end{array}\right]\left[\begin{array}{cc}{c}_0(\lambda )& -j{s}_0(\lambda )\\ -j{s}_0(\lambda )& c_0(\lambda )\end{array}\right].$$(1a)

The through and cross port transmissions are respectively defined as $c_{0,1}=\sqrt{1-{\kappa }_{0,1}(\lambda )}$ and $-j{s}_{0,1}=-j\sqrt{{\kappa }_{0,1}(\lambda )}$, where ${\kappa }_{1,2}$ is the power coupling coefficient for each coupler and $\mathrm{\Delta }{L}_1$ is the path length difference that determines the FSR. The FSR of a (de-)interleaver is twice the intended channel spacing where $\mathrm{FSR}={\lambda }_{\text{target}}/n_g\mathrm{\Delta }L$. $\mathrm{\Delta }L$ is the base optical path length difference between the upper and lower arms. Therefore, a channel spacing of 65 GHz for the second-order AMZI requires $\mathrm{\Delta }L=610.5\mathrm{\mu m}$ for a calculated group index of $n_g=3.78$. The transfer function of a higher $N$th-order AMZI can be derived by simply cascading another set of matrices such that the transfer function can be succinctly defined as $${\mathrm{\Phi }}_N=\left[\begin{array}{cc}{e}^{-j2\pi n_g(\lambda )\mathrm{\Delta }{L}_N/\lambda }& 0\\ 0& 1\end{array}\right]\left[\begin{array}{cc}{c}_N(\lambda )& -j{s}_N(\lambda )\\ -j{s}_N(\lambda )& c_N(\lambda )\end{array}\right]=\left[\begin{array}{cc}{c}_N(\lambda )e^{-j2\pi n_g(\lambda )\mathrm{\Delta }{L}_N/\lambda }& -j{s}_N(\lambda )e^{-j2\pi n_g(\lambda )\mathrm{\Delta }{L}_N/\lambda }\\ -j{s}_N(\lambda )& c_N(\lambda )\end{array}\right],$$(1b)$${\mathrm{\Phi }}_{N\text{order AMZI}}=\left[\begin{array}{cc}{c}_{N+1}(\lambda )& -j{s}_{N+1}(\lambda )\\ -j{s}_{N+1}(\lambda )& c_{N+1}(\lambda )\end{array}\right]{\mathrm{\Phi }}_N\dots {\mathrm{\Phi }}_0.$$(1c)

For a second-order AMZI, the second arm delay is defined as $\mathrm{\Delta }{L}_2=2\mathrm{\Delta }{L}_1$ with coupling coefficients $c_1$, $c_2$, $c_3$ being 0.50, 0.29, 0.08, respectively. Table 2 outlines these design parameters. The power splitters implemented throughout this paper are standard directional couplers, and dimensional tolerances were examined for performance robustness in terms of $\mathrm{\Delta }{\kappa }^2/\mathrm{\Delta }\mathrm{\Omega }$ where $\kappa$ is the field coupling coefficient and $\mathrm{\Omega }$ is either width ($w$), gap ($g$), or ED. For a 50% power coupler, the percent difference from nominal was $\pm 9\%/40\mathrm{nm}$, $\pm 11\%/40\mathrm{nm}$, and $\pm 20\%/40\mathrm{nm}$ for $\mathrm{\Delta }{\kappa }^2/\mathrm{\Delta }w$, $\mathrm{\Delta }{\kappa }^2/\mathrm{\Delta }g$, and $\mathrm{\Delta }{\kappa }^2/\mathrm{\Delta }\mathrm{ED}$, respectively. Etch control is expected to be $\pm 10\mathrm{nm}$, which made the choice of using directional couplers a reasonable one due to its lower backreflection, albeit more spectrally narrow band than a multi-mode interferometer (MMI) coupler. On the other hand, broadband directional couplers have been demonstrated [50] and offer an alternative to traditional MMIs with limited arbitrary splitting ratios. Arbitrary power splitting ratios for MMIs have been demonstrated [44,45], but were not used to de-risk design complexity.Table 2.

Design Summary of III–V/Si MOSCAP $N$th-Order AMZI (De-)interleavers

Figures 5(a) and 5(b) show the calculated optical response of a second-order and third-order AMZI for the cases of with and without phase tuning. The solid lines indicate the case for perfect phase tuning whereas the dashed lines indicate the case for a $\pi$ phase offset. Phase errors are an unavoidable issue in high-contrast-index systems such as the SOI platform and usually require power-hungry thermal phase tuning to achieve the expected response in phase-sensitive devices such as (de-)interleavers, AWGs, and lattice filters. For the second-order AMZI, we assume an effective width variation of $\mathrm{\Delta }w=2\mathrm{nm}$ between the two delay paths due to sidewall roughness and variability. This results in a variation of $\mathrm{\Delta }{n}_{\mathrm{eff}}=0.0011$ (${\mathrm{d}n}_{\mathrm{eff}}/\mathrm{d}w=5.974\times {10}^{-4}{\mathrm{nm}}^{-1}$), which is large enough to increase theoretical XT by 13 dB. It will be shown in the experimental section that the III–V/Si MOSCAP tuning can significantly improve channel XT with ultra-low power consumption. Third-order AMZIs exhibit wider 1 dB channel bandwidth due to the increased passband roll-off compared to a second-order AMZI, however, at the cost of increased waveguide loss due to a third delay arm. An extra coupler also makes it more challenging to realize than a second-order AMZI. As can be seen in the insets of Figs. 5(a) and 5(b), the long delay paths for each (de-)interleaver design were made in a spiral geometry to minimize footprint size.

Ring-assisted AMZIs with $N$ rings have been shown to exhibit wider flat-top response with improved channel XT [51]. There have been a number of demonstrations on silicon with channel spacing ranging from 120 to 1250 GHz and channel XT $\sim -22\mathrm{dB}$ [16,19,42,43,45,51]. The one-ring-assisted AMZI (one-ring RAMZI) is modeled by [49] $${\mathrm{\Phi }}_{1-\text{ring RAMZI}}=\left[\begin{array}{cc}{c}_1(\lambda )& -j{s}_1(\lambda )\\ -j{s}_1(\lambda )& c_1(\lambda )\end{array}\right]\left[\begin{array}{cc}{A}^R(z)/A(z)& 0\\ 0& e^{j2\pi n_g(\lambda )L_{\mathrm{ring}}/\lambda }\end{array}\right]\left[\begin{array}{cc}{c}_0(\lambda )& -j{s}_0(\lambda )\\ -j{s}_0(\lambda )& c_0(\lambda )\end{array}\right],$$(2a)$$A^R(z)=\sqrt{1-{\kappa }_r}+{(e^{j2\pi n_g(\lambda )L_{\mathrm{ring}}/\lambda })}^{-2},$$(2b)$$A(z)=1+\sqrt{1-{\kappa }_r}{(e^{j2\pi n_g(\lambda )L_{\mathrm{ring}}/\lambda })}^{-2}.$$(2c)

The AMZI bar and cross port transmissions are respectively defined similarly for a first-order AMZI filter with the addition that ${\kappa }_r$ is the ring coupling coefficient. The FSR is defined by the ring circumference such that the $\mathrm{FSR}=c/n_{g}L$. Therefore, a channel spacing of 65 GHz for the one-ring RAMZI requires $L_{\mathrm{ring}}=1200\mathrm{\mu m}$ for a calculated group index of $n_g=3.78$. The transfer function of an $N$-ring RAMZI can be derived by simply cascading another set of matrices such that the transfer function can be succinctly defined as $${\mathrm{\Phi }}_{N-\text{ring RAMZI}}=\left[\begin{array}{cc}{c}_1(\lambda )& -j{s}_1(\lambda )\\ -j{s}_1(\lambda )& c_1(\lambda )\end{array}\right]{\mathrm{\Phi }}_N\dots \left[\begin{array}{cc}{A}_1^R(z)/A_1(z)& 0\\ 0& e^{j2\pi n_g(\lambda )L_{\mathrm{ring}}^N/\lambda }\end{array}\right]\left[\begin{array}{cc}{c}_0(\lambda )& -j{s}_0(\lambda )\\ -j{s}_0(\lambda )& c_0(\lambda )\end{array}\right],$$(2d)$${\mathrm{\Phi }}_N=\left[\begin{array}{cc}1& 0\\ 0& A_N^R(z)/A_N(z)\end{array}\right],$$(2e)$$A_N^R(z)=\sqrt{1-{\kappa }_r^N}+{(e^{j2\pi n_g(\lambda )L_{\mathrm{ring}}^N/\lambda })}^{-2},A_N(z)=1+\sqrt{1-{\kappa }_r^N}{(e^{j2\pi n_g(\lambda )L_{\mathrm{ring}}^N/\lambda })}^{-2}.$$(2f)

The ideal ring resonator coupling for one-ring RAMZI, two-ring RAMZI, and three-ring RAMZI occurs at ${\kappa }_r=0.89$; ${\kappa }_r^{1,2}=0.97$, 0.62; and ${\kappa }_r^{1,2,3}=0.96$, 0.68, 0.25, respectively. Table 3 outlines these design parameters.Table 3.

Design Summary of III–V/Si MOSCAP One-, Two-, Three-ring RAMZI (De-)interleavers

Figures 6(a)–6(c) show the calculated optical responses of the one-, two-, and three-ring RAMZIs for the case of with and without phase tuning. Again, the solid lines indicate the case for perfect phase tuning whereas the dashed lines indicate the case for a $\pi$ phase offset for each of the rings. The result of successive ring resonator loading on one or both AMZI arms allows for broadband and flat passbands at the expense of complicated coupler and phase control, as well as increased optical losses on fabricated devices. Optical insertion loss has the effect of reducing the flatness of the passbands; therefore, waveguide scattering should be kept to a minimum in fabricated devices. In fact, passband flatness is much more sensitive to loss than to alternative $N$th-order AMZI designs. Simulations show that for every additional 10 dB/cm loss incurred, there will be a 14% reduction of the 0.5 dB bandwidth.

For the one-ring RAMZI, we assume an effective width variation of $\mathrm{\Delta }w=2\mathrm{nm}$ between the ring circumference and delay path due to sidewall roughness and variability. A local effective index variation of $\mathrm{\Delta }{n}_{\mathrm{eff}}=0.0011$ (${\mathrm{d}n}_{\mathrm{eff}}/\mathrm{d}w=5.974\times {10}^{-4}{\mathrm{nm}}^{-1}$) is found to be large enough to increase theoretical XT by $>40\mathrm{dB}$. Also, waveguide and power coupler dispersion will have to be taken into account such that perturbations in the delay arm of the ring-assisted AMZI will be minimum for ultra-broadband operation ($>100\mathrm{nm}$). In Fig. 6(d), for completeness, we included the design of a 65 GHz (de-)interleaver based on the use of two second-order ring resonators for each drop channel. The details of the design can be found in Refs. [52–55], but the purpose is to illustrate that AMZI-based designs are the more appropriate design choice based on wider channel passbands.

Experimentally, we explored three different MOSCAP gate oxide designs with varying degrees of silicon doping and a dielectric selection of ${\mathrm{Al}}_2{\mathrm{O}}_3$ and/or ${\mathrm{HfO}}_2$. These designs are shown in Table 4. The ${\mathrm{HfO}}_2$ dielectric has a higher dielectric constant ($k\sim 25$) compared to ${\mathrm{Al}}_2{\mathrm{O}}_3$ ($k\sim 9$); therefore, a ${\mathrm{HfO}}_2$-based capacitor should have $\sim 3\times$ the capacitance for the same unit area. However, the measured thickness of ${\mathrm{HfO}}_2$ in Design 2 is 10 nm with an additional 3 nm of ${\mathrm{Al}}_2{\mathrm{O}}_3$, which indicates the capacitance is only $\sim 1.7\times$ or less compared to Design 1. The majority of measured (de-)interleavers in this paper are based on Designs 1 and 2.Table 4.

Fabricated Platform Variations

In-house device fabrication begins with a 100 mm SOI wafer which consists of a 350 nm thick top silicon layer and a 2 μm buried oxide layer, as shown in Fig. 3(a). The top silicon is thinned down to 300 nm by thermal oxidation and buffered hydrofluoric acid etching, thus leaving a clean silicon surface. Doped silicon regions are defined by a deep-UV (248 nm) lithography stepper, and boron is implanted to create p-Si regions. Grating couplers, silicon rib waveguides, and vertical out-gassing channels [56] are respectively patterned using the same deep-UV stepper and then subsequently etched 170 nm with ${\mathrm{Cl}}_2$-based gas chemistry. Next, a dielectric of ${\mathrm{Al}}_2{\mathrm{O}}_3$ and/or ${\mathrm{HfO}}_2$ is deposited on both the patterned silicon and GaAs/AlGaAs epi-wafer via atomic layer deposition. The two wafers are then wafer bonded. An ${\mathrm{Al}}_{0.20}{\mathrm{Ga}}_{0.80}\mathrm{As}$ etch stop layer allows selective substrate removal via wet etching, thus leaving a 150 nm thick n-GaAs thin film on top of the SOI substrate. Next, the III–V film is defined and dry etched for device regions that require the use of MOSCAP phase tuning. The III–V film covers all of the delay lengths or ring resonators up until the ends of the directional couplers. Next, a plasma-enhanced chemical vapor deposition ${\mathrm{SiO}}_2$ cladding is deposited and vias are defined and etched. Finally, the n-contact and p-contact are defined on the n-GaAs and p-Si layers, respectively. Optical microscopic images of the various fabricated (de-)interleaver devices are shown in Figs. 7(a)–7(f).

The spectral responses of the MOSCAP (de-)interleavers were characterized with a Thorlabs superluminescent diode capable of 40 nm bandwidth (1290–1330 nm) and a launch power of 12 dBm. The 100 mm wafer is vacuum mounted onto a stainless-steel chuck on a semi-automatic probe station. Light is vertically coupled in/out of devices via grating couplers and a 7° polished fiber array with 250 μm pitch. Polarization control is performed with the use of a polarization controller and maximized for peak transmission on a straight test waveguide. All measured (de-)interleaver responses are normalized to a 0.5 μm wide straight waveguide with a length of $\sim 850\mathrm{\mu m}$. However, this is not the same length as the various (de-)interleaver designs measured throughout this paper. The pre-bonded 0.5 μm wide straight waveguide TE losses were determined to be about $\sim 9.2\mathrm{dB}/\mathrm{cm}$ for a wavelength of 1310 nm from a series of cutback test structures. 0.8 μm wide straight waveguide TE losses were about 9.8 dB/cm. After III–V removal, TE waveguide losses were measured to be $\sim 21.1$ and 42.2 dB/cm for the 0.8 and 0.5 μm wide waveguides, respectively. TE waveguide losses with wafer-bonded III–V regions are undetermined due to the absence of these types of test structures. Circular bends of radius 2, 5, 7, 14 μm had bend losses 1.22, 0.83, 0.3, 0.08 dB/90° bend, respectively. Spline bends with a radius of 4 μm and angles of 45°, 10°, 5° have measured bend losses of 0.23, 0.86, 1.09 dB/bend, respectively. The angular coverage of a spline bend is discussed at length in Ref. [57]. A spline bend with radius of 2 μm exhibited a bend loss of 0.74 dB/bend. Grating coupler losses before and after bonding were calculated to be 7.7 and 7.8 dB/coupler (using single cleaved fibers angled at 13°) indicating negligible effect after III–V removal. The use of a 7° polished fiber array for the (de-)interleaver experiments is expected to significantly increase coupling losses to $\sim 14\mathrm{dB}/\text{coupler}$. Initial phase tuning measurements were performed on a 350 μm long $\mathrm{p}\text{−}\mathrm{Si}/{\mathrm{Al}}_2{\mathrm{O}}_3(6\mathrm{nm})\text{/n-GaAs}$ MOSCAP MZI structure and spectral responses indicated $\sim 2\mathrm{nm}$ of tuning at a 2 V bias while maintaining an extinction ratio of $\sim 24\mathrm{dB}$, as shown in Fig. 8(b). The measured $\mathrm{FSR}=18.58\mathrm{nm}$ and the calculated ${\mathit{V}}_{\pi }\mathit{L}=0.325\mathrm{V}·\mathrm{cm}$ which is $4\times$ smaller than typical values seen in PN junction-based phase tuners. The observed leakage current appears to be smaller than the current meter limit of sub-nA, indicating negligible power consumption. The MOSCAP MZI is capable of achieving 4 Gbit/s eye diagrams and an $f_{3\mathrm{dB}}\sim 1.5\mathrm{GHz}$. We also measured an MZI with ${\mathrm{HfO}}_2(10\mathrm{nm}){\text{/Al}}_2{\mathrm{O}}_3$ (3 nm) dielectric; however, the ${\mathit{V}}_{\pi }\mathit{L}$ was slightly larger (${\mathit{V}}_{\pi }\mathit{L}=0.487\mathrm{V}·\mathrm{cm}$) than the ${\mathrm{Al}}_2{\mathrm{O}}_3$ counterpart. We believe this is due to the thicker ${\mathrm{HfO}}_2$ and ${\mathrm{Al}}_2{\mathrm{O}}_3$ capacitor or/and smaller dielectric constant in actual gate oxide thin film than their literature values. III–V/Si transitions are also important to consider since MOSCAP structures are only placed in regions where phase tuning is desired for a large-scale photonic integrated circuit. We numerically analyze the reflection and insertion loss of the III–V/Si interface as a function of angle between the III–V and Si, as shown in Fig. 8(a). Three-dimensional finite-difference time-domain simulations show minimal reflection ($<-60\mathrm{dB}$) back into the fundamental ${\mathrm{TE}}_{00}$ mode at an angle of 45° with an insertion loss of 0.36 dB/facet. Minimal insertion loss was found to occur at 72°, but with increased reflection into the main ${\mathrm{TE}}_{00}$ mode. Throughout this paper, an angle of $\theta =45°$ is used for all fabricated and measured (de-)interleavers. Angled GaAs/Si interface losses were evaluated by cutback loss structures shown in Fig. 8(a). The interface losses for angles of 0°, 45°, and 72° were measured to be 1.08, 0.69, and 0.29 dB/facet, respectively, and match up with simulated values quite well.

Figures 9(a) and 9(b) show the measured optical response for a second-order MOSCAP AMZI (de-)interleaver before and after phase correction, respectively. In the second-order AMZI, errors in the three coupling ratios and the path length difference $\mathrm{\Delta }L$ can contribute to non-ideal passband response with reduced channel XT. As shown in Fig. 9(a), the cross and bar channels exhibit $\mathrm{XT}\sim -10.1$ and $-18.8\mathrm{dB}$, respectively. With appropriate modeling using the transfer matrix model, it was determined the biggest error came from the first coupler $c_0$ being 0.35 instead of the ideal 0.50 as well as a 0.0035% error in the lengths between the first and second delay paths. The assumption of $c_0\sim 0.35$ is further experimentally substantiated by confirming a 190 nm etch depth will yield this cross-coupling value. By applying $-1\mathrm{V}$ on the first delay length (${\mathit{V}}_{\text{delay}1}$) to correct for this error, the XT of the bar channel was improved from $-10.1\mathrm{dB}$ to $-15.3\mathrm{dB}$ while the cross-channel XT improved from $-18.8\mathrm{dB}$ to 21.8 dB. At ${\mathit{V}}_{\text{delay}1}=-1\mathrm{V}$, approximately 83.0 nA was drawn resulting in a tuning power consumption of 83.0 nW. Regarding IL, the measured ILs before and after MOSCAP tuning were $\sim 1.8$ and 2.0 dB. Keep in mind that all (de-)interleaver structures have two III–V/Si interfaces each angled at 45°. Therefore, 1.4 dB of the total IL can be attributed to III–V/Si interface losses. The remaining losses will be due to a combination of FCA, doping absorption, and waveguide interface scattering. In the future, an angle ($\theta =72°$) with lower interface loss (0.3 dB/facet) or III–V/Si taper structure will be used. Figures 10(a) and 10(b) show the measured optical response for a third-order MOSCAP AMZI (de-)interleaver before and after phase correction, respectively. Modeling shows that the non-ideal passband transmission in Fig. 10(b) came from $c_0=0.35$, $c_1$, $c_2=0.18$ along with a 0.004% error in $\mathrm{\Delta }\mathit{L}$. With the appropriate bias conditions (${\mathit{V}}_{\text{delay}1}=0.3\mathrm{V}$, ${\mathit{V}}_{\text{delay}2}=1.0\mathrm{V}$, ${\mathit{V}}_{\text{delay}3}=0.1\mathrm{V}$), the XT of the bar channel was improved from $-7.9\mathrm{dB}$ to $-27.8\mathrm{dB}$ or $-32.0\mathrm{dB}$ while the cross-channel XT improved from $-4.6\mathrm{dB}$ to 22.0 dB. In this case, the XT levels approach the theoretical limit, as shown in Fig. 5(b). The total tuning power consumption was calculated to be 53.0 nW.

Figures 11(a)–11(e) show the measured optical responses for one-, two-, and three-ring-assisted MOSCAP AMZI (de-)interleavers before and after phase correction, respectively. The main source of errors for non-ideal passbands and reduced XT comes from errors in the AMZI coupling ratios ($c_0$, $c_1$), ring coupler ratios (${\kappa }_r$, ${\kappa }_r^1$, ${\kappa }_r^2$, ${\kappa }_r^3$), and the path length difference $L_{\mathrm{ring}}/2$. Fortunately, $c_0=c_1=0.50$; thus the case of the one-ring-assisted AMZI requires only two parameters to target compared to the $N$th-order AMZIs. As shown in Fig. 11(a), the measured bar and cross channels for the one-ring-assisted AMZI exhibit $\mathrm{XT}\sim -7.1\mathrm{dB}$ and $-10.7\mathrm{dB}$, respectively, before phase correction. By applying $-2\mathrm{V}$ on the delay length (${\mathit{V}}_{\mathrm{delay}}$), the XT of the bar channel was improved from $-7.1\mathrm{dB}$ to $-16.4\mathrm{dB}$ while the cross-channel XT improved from $-10.7\mathrm{dB}$ to $-26.6\mathrm{dB}$. At ${\mathit{V}}_{\mathrm{delay}}=-2\mathrm{V}$, approximately 5.0 nA was drawn resulting in a tuning power consumption of 10.0 nW. The passbands are far from the theoretical flat-top response shown in Fig. 6(a), which indicates a combination of waveguide loss and errors in power coupling coefficients. No flat-top response is mainly attributed to waveguide loss, whereas increase channel XT indicates non-ideal power coupling. An improved design is underway with the use of robust 50% MMI power couplers for $c_0$ and $c_1$ as well as tunable MOSCAP directional couplers for the ring resonator. The two- and three-ring-assisted AMZIs are considerably more complicated owing to the fact that there are multiple ring resonator coupling ratios that have to be targeted as well as the presence of increased optical losses. As shown in Figs. 11(c) and 11(d), the bar and cross channel XT for the two-ring-assisted AMZI is $-4.3\mathrm{dB}$ and $-4.7\mathrm{dB}$, respectively, without tuning. After phase correction of the delay length, the bar and cross-channel XT improved $\mathrm{to}-20.6\mathrm{dB}$ and $-21.5\mathrm{dB}$. At a ${\mathit{V}}_{\mathrm{delay}}=-1.9\mathrm{V}$, approximately 3.8 μA was drawn resulting in a tuning power consumption of 7.2 μW. Again, the passbands are far from the intended flat-top response shown in Fig. 6(b) and attempts were made to tune a combination of the two rings and delay; however, none resulted in the theoretical passbands. This most likely indicates errors in the coupling coefficients ${\kappa }_{r1}$, ${\kappa }_{r2}$, $c_0$, and $c_1$ and the presence of increased optical loss beyond the 9.2 dB/cm measured before wafer-bonding. With improved reduction of losses in the future, we believe flat-top response will be achievable. The bar and cross channel XT for the three-ring-assisted AMZI in Fig. 11(e) is $-6.1\mathrm{dB}$ and $-4.3\mathrm{dB}$ without tuning. With ${\mathit{V}}_{\mathrm{delay}}=-3\mathrm{V}$, the channel XT improved to $-20.0\mathrm{dB}$ and $-18.1\mathrm{dB}$ for the bar and cross channels, respectively. The reasons for non-ideal passband shapes are the same as discussed above. At a ${\mathit{V}}_{\mathrm{delay}}=-3.0\mathrm{V}$, approximately 11.2 nA was drawn resulting in a tuning power consumption of 33.6 nW. The leakage current density for the two-ring-assisted AMZI is quite high and represents an outlier possibly due to design/fabrication imperfections which results in electrical conduction between tuners in some areas. Overall, the leakage current density is measured to be in the range of $1.6–27\mathrm{\mu A}/{\mathrm{cm}}^2$, if the two-ring-assisted AMZI is ignored.

Regarding device repeatability, the wafer-bonded III–V film was only large enough to cover four dies (each $9.4\times 9.0\mathrm{mm}$) on a 4 in. SOI wafer with a unique device in each die. We measured the one-ring-assisted AMZI from each die without MOSCAP tuning and (de-)interleaver response can vary greatly. This can be due to wafer variability, global fabrication inaccuracies such as etch depth and waveguide width which can affect either the directional couplers or path length differences. In addition, the possibility of the wafer-bonding process altering the aforementioned reasons is unknown at this time. However, we believe if the directional couplers can be substituted with fabrication robust MMIs or tunable directional couplers, device performance yield should increase significantly with minimal power consumption cost. The use of MMIs and the evaluation of tunable MOSCAP directional couplers will be underway in the near future.

This work demonstrates for the first time various III–V/Si MOSCAP (de-)interleavers consisting of second/third-order AMZIs and one-, two-, three-ring-assisted AMZIs with 65 GHz channel spacing at O-band wavelengths. The wafer-bonded MOSCAP structure allows for ultra-low-power phase tuning compared to thermal counterparts. Such athermal phase tuning allows more compact integration without thermal XT/impact on other components. The tuning response is also in sub-nanosecond scale as shown by high-speed MOSCAP modulators we developed recently [13]. The second- and third-order MOSCAP AMZI (de-)interleavers have XT levels down to $-22$ dB and $-32\mathrm{dB}$ with tuning powers of 83.0 and 53.0 nW, respectively. The one-, two-, and three-ring-assisted MOSCAP AMZI (de-)interleavers have XT levels down to $-27$, $-22$, and $-20\mathrm{dB}$ for tuning powers of 10.0, 7220.0, and 33.6 nW. Overall, the leakage current density is measured to be in the range of $1.6–27\mathrm{\mu A}/{\mathrm{cm}}^2$, assuming an outlier from the two-ring-assisted AMZI. Transfer matrix calculations indicate non-ideal coupling ratios and path length differences affect bandpass shape, whereas waveguide loss will affect flat-top response and overall insertion loss. The demonstrated (de-)interleavers represent the lowest tuning power consumption and XT levels for (de-)interleavers on a silicon platform. Future improvements will include the use of fabrication robust MMI-based arbitrary power couplers, tunable MOSCAP directional couplers/MZIs, advanced dispersion engineered components, and better fabrication process for lower waveguide loss. These should all further improve XT levels down to theoretical values for each respective design and increase overall $\text{bandwidth}>100\mathrm{nm}$. Current investigation into thinner and higher-k dielectric such as ${\mathrm{HfO}}_2$ is underway for improved phase tuning efficiency. We believe the III–V/Si MOSCAP (de-)interleaver presented here is a fundamental building block that offers significant improvement in energy efficiency for future large-scale DWDM transceivers, optical neural networks, RF-photonics, and programmable photonic architectures.

Acknowledgment. We thank the UCSB nanofabrication facilities.