A fully integrated low noise amplifier (LNA) for Wi-Fi 6 (5 GHz) was designed and implemented in a 55 nm standard CMOS process. The design included a source-degenerate cascode amplifier, a balun and a gain switching cell. All inductors were realized on chip. A balun was adopted as the load to perform the single-to-differential conversion. In addition, in order to deal with different input power, the LNA had high gain and low gain mode. Measurement results indicated that the LNA achieved a maximum voltage gain of 202 dB when switched to high gain mode, and the corresponding minimum noise figure was 2.2 dB. In low gain mode, the gain was 15 dB, and the corresponding maximum input -1 dB compression point was -3.2 dBm. The chip occupies a core area of 0.28 mm2, and the static power consumption was 10.2 mW.