[1] LEUNG K N, ZHENG Y, ZHOU Y. An output-capacitorless low-dropout regulator with high slew rate and unity-gain bandwidth [C]// 2020 IEEE International Symposium on Circuits and Systems. Seville, Spain. 2020: 1-5.
[2] ALLEN P E, RINCON-MORA G A. A low-voltage, low quiescent current, low drop-out regulator [J]. IEEE Journal of Solid-State Circuits, 1998, 33(1): 36-44.
[3] CHEN D, LIU N. A transient-enhanced output-capacitorless LDO with fast local loop and overshoot detection [J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2020, 67(10): 3422-3432.
[4] BU S, GUO J, LEUNG K N. A 200-ps-response-time output-capacitorless low-dropout regulator with unity-gain bandwidth >100 MHz in 130-nm CMOS [J]. IEEE Transactions on Power Electronics, 2018, 33(4): 3232-3246.
[5] GUO J, LI G, QIAN H, et al. Dual active-feedback frequency compensation for output-capacitorless LDO with transient and stability enhancement in 65-nm CMOS [J]. IEEE Transactions on Power Electronics, 2020, 35(1): 415-429.
[6] LEE J, ROH J, TANG J. Low-power fast-transient capacitor-less LDO regulator with high slew-rate class-AB amplifier [J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66(3): 462-466.
[7] LI X, WU T, ZENG Y, et al. A 2.8 μA, sub-1 μs output-capacitorless LDO with transient detecting control technique [C]// 2021 IEEE Asia Pacific Conference on Circuit and Systems. Penang, Malaysia. 2021: 229-232.
[8] LAW M K, MAK P I, YAN Z, et al. Nested-current-mirror rail-to-rail-output single-stage amplifier with enhancements of DC gain, GBW and slew rate [J]. IEEE Journal of Solid-State Circuits, 2015, 50(10): 2353-2366.