• Acta Photonica Sinica
  • Vol. 41, Issue 3, 364 (2012)
SU Wan-xin*
Author Affiliations
  • [in Chinese]
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    DOI: 10.3788/gzxb20124103.0364 Cite this Article
    SU Wan-xin. Design of a Large Array CMOS Image and Display System in Real-time Synchronization[J]. Acta Photonica Sinica, 2012, 41(3): 364 Copy Citation Text show less
    References

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    [2] WANG Ming-fu, YANG Shi-hong, WU Qin-zhang. Design of large-array CCD real-time display system[J]. Optics Precision Engineering, 2010, 18(9): 2053-2059.

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    [4] CHEN Shu-dan, WEN De-sheng, YAND Wen-cai. Design and implementation of driving circuit for high frame rate CMOS camera based on CPLD[J]. Electronic Design Engineering, 2008, 11: 9-11.

    [5] RAN Xiao-qiang, WEN De-sheng, ZHENG Pei-yun. Designing on driving sch edule gen erat or f or space array CCD camera and hardware based on CPLD[J] . Acta Photonica Sinica, 2007, 36(2): 364-367.

    [6] YANG Lu, SU Xiu-qin, XIANG Jing-bo. Design of video image processing system based on DSP and FPGA[J] . Control & Automation, 2008, 24(21): 288-289.

    [7] SU Wan-xin, CHENG Ling-yan, CHENG Fei-yan. Design of real-time video signal processing system based on DSP+ FPGA[J]. Chinese Journal of Liquid Crystals and Displays, 2010, 25(1): 145-148.

    [8] Micron.Mt9m413c36stc Handbook[M]. Micron,Ver. 3.0 1/2004 EN.

    SU Wan-xin. Design of a Large Array CMOS Image and Display System in Real-time Synchronization[J]. Acta Photonica Sinica, 2012, 41(3): 364
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