A Charge Pump for Clock Management Circuit of Analog-to-Digital Converters

ZHOU Qianneng; LI Heng; LI Hongjuan; ZHANG Hongsheng; YANG Hong; TANG Zhengwei

doi:10.13911/j.cnki.1004-3365.zjea006

Journals >Microelectronics >Volume 52 >Issue 4 >Page 539 > Article

Microelectronics
Vol. 52, Issue 4, 539 (2022)

A Charge Pump for Clock Management Circuit of Analog-to-Digital Converters

ZHOU Qianneng¹, LI Heng¹, LI Hongjuan², ZHANG Hongsheng¹, YANG Hong¹, and TANG Zhengwei¹

Author Affiliations

¹[in Chinese]

²[in Chinese]

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DOI: 10.13911/j.cnki.1004-3365.zjea006 Cite this Article

ZHOU Qianneng, LI Heng, LI Hongjuan, ZHANG Hongsheng, YANG Hong, TANG Zhengwei. A Charge Pump for Clock Management Circuit of Analog-to-Digital Converters[J]. Microelectronics, 2022, 52(4): 539 Copy Citation Text

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References

[3] WANG D, ZHU X G, GUO X, et al. A 2.6 GS/s 8-bit time-interleaved SAR ADC in 55 nm CMOS technology ［J］. Elec, 2019, 8(3): 305-316.

ZHOU Qianneng, LI Heng, LI Hongjuan, ZHANG Hongsheng, YANG Hong, TANG Zhengwei. A Charge Pump for Clock Management Circuit of Analog-to-Digital Converters[J]. Microelectronics, 2022, 52(4): 539

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