The principle and implementation of Σ-Δ ADC’s down sampling filter and up sampling filter in the hearing aid chip was presented. Through optimizing the structure and multiplexing the filter’s coefficient, the chip area was reduced. The filter coefficients were programmable to realize the dynamic switching between passband flatness and transition bandwidth as well as the different sampling rate. The circuit was fabricated and verified by MPW in SMIC 130 nm 1P8M CMOS process. The results showed that the filter supported 16 kHz and 32 kHz sampling rates, which could meet the needs of DSP for hearing aid with different sampling rates. The passband ripple of the cascaded filter was 0.001 dB, the stopband attenuation was 80 dB, and the maximum group delay was 3.877 ms. It could meet the requirement of signal conversion circuit of hearing aid.