[1] WANG K J, SWAMINATHAN A, GALTON I. Spurious-tone suppression techniques applied to a wide- bandwidth 24 GHz fractional-N PLL ［J］. IEEE J Sol Sta Circ, 2008, 43(12): 2787-2797.
[2] TI C L, LIU Y H, LIN T H. A 24-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit ［C］ // Proceed IEEE ISCAS. Seattle, WA, USA. 2008: 1728-1731.
[3] HSIEH P Y, SHU S Y, YANG C Y. A spur-suppression technique for frequency synthesizer with pulse-width to current conversion ［C］ // Proceed IEEE ISPACS. Taipei, China. 2019: 1-2.
[4] FU X M, EL-SANKARY K, YIN Y D. A pulse injection background calibration technique for charge pump PLLs ［C］ // Proceed IEEE NEWCAS. Montreal, QC, Canada. 2020: 98-101.
[5] KIM K S, KIM K M, YOO C S. A fREF/5 bandwidth type-II charge-pump phase-locked loop with dual-edge phase comparison and sampling loop filter ［J］. IEEE Microw Wirel Compon Lett, 2018, 28(9): 825-827.
[6] LIN T H, TI C L, LIU Y H. Dynamic current-matching charge pump and gated-offset linearization technique for delta-signal fractional-N PLLs ［J］. IEEE Trans Circ Syst I: Regul Pap, 2009, 56(5): 877-885.
[7] KHALIL W, HEDAYATI H, BAKKALOGLU B, et al. Analysis and modeling of noise folding and spurious emission in wideband fractional-N synthesizers ［C］ // Proceed IEEE RFIC. Atlanta, GA, USA. 2008: 291-294.
[8] MO H J, HU G S, KENNEDY P M. Comparison of analytical predictions of the noise floor due to static charge pump mismatch in fractional-N frequency synthesizer ［C］ // Proceed IEEE ISCAS. Montreal, QC, Canada. 2016: 2407-2410.
[9] ERGINTAV A, HERZEL F, FISCHER G, et al. A study of phase noise and frequency error of a fractional-N PLL in the course of FMCW chirp generation ［J］. IEEE Trans Circ Syst I: Regul Pap, 2019, 66(5): 1670-1680.
