A 16-channel high speed front end readout circuit for CdZnTe detectors was designed in a 035 μm CMOS process. The circuit was composed of 16 analog channels, bias module and logic control module. Each channel included a charge-sensitive amplifier, a leakage current compensation circuit, a shaper circuit, a baseline hold circuit, a peak detection hold circuit and a time discriminator. The performance of the main circuit modules and the readout timing of the channel were analyzed at high incident frequency. The simulation results showed that the input energy range of the readout circuit was 29~430 keV@1~15 fC, the power consumption of each channel was less than 18 mW, the equivalent noise charge was 87.6e-, and the maximum compensation leakage current was 50 nA. The peak time was 150 ns, the channel gain was 50 mV/fC, the nonlinearity was less than 1%, and the maximum injection frequency was 500 kHz.