With the reduction of process nodes and the increase of complexity of integrated circuit scale, the logic equivalence check plays an important role in ensuring the correctness of design functions in the process of integrated circuit design. The logic equivalence checking technology of combinational circuits was studied in this paper. Aiming at the problems of DPLL and CDCL algorithms commonly used in this field, an improved algorithm based on Monte Carlo tree search was proposed to solve the satisfiable problem. Through the experiment on a subset of ISCAS85 test set, it is proved that the algorithm has a certain improvement on CDCL algorithm, and the average running time applied to combinational circuit equivalence check is reduced by about 20%.