Fig. 1. (a) Typical multiple polarization (P) versus voltage loops under various voltage amplitudes obtained from an Au/PVDF/Al capacitor. (b) Schematic illustration of multiple domains states in a ferroelectric film. (c) Sketch of a synapse.

Fig. 2. Schematic representation of the energy potential profile in an FTJ for polarization pointing to the electrode one (Metal₁) (a) and for polarization pointing to the electrode two (Metal₂) (b). Reproduced from Ref. [7], copyright 2005, with permission of APS.

Fig. 3. (a) Evolution of the junction resistance and ferroelectric domain configuration in a 180 nm wide (Ca,Ce)MnO₃/BiFeO₃/Pt/Co FTJ. (b) Symbols are experimental resistance as a function of percentage of down domains extracted from the PFM phase images and the black curve is a simulation in a parallel resistance model shown in inset. Reproduced from Ref. [24], copyright 2013, with permission of ACS.

Fig. 4. The FTJ could be treated as a two-terminal synapse where the top and bottom electrodes transmit signals from pre and post neurons. (a) Sketch of pre- and post-neurons connected by a synapse. (b) Sketch of the (Ca,Ce)MnO₃/BiFeO₃/Pt/Co FTJ. YAO stands for YAlO₃. (c) Single-pulse hysteresis loop of the resistance versus voltage amplitude, there are voltage thresholds ± V_th beyond which resistive switching occurs. (d) Measurements of STDP in the FTJ. The junction conductance increases or decreases depending on the timing and causality of pre and post electrical signals. The insets show the waveforms produced by the superposition of presynaptic and postsynaptic spikes. Reproduced from Ref. [43], copyright 2014, with permission of Springer Nature.

Fig. 5. (a) STDP measurement in La_0.7Sr_0.3MnO₃/BaTiO₃/La_0.7Sr_0.3MnO₃ MTJ with the parallel (p) or antiparallel (AP) states of magnetization alignment in electrodes. (b) Schematic illustration of the magnetoelectrically coupled memristor and the corresponding synapses. Reproduced from Ref. [44], copyright 2018, with permission of ACS.

Fig. 6. (a) Ferroelectricity in ultrathin thin films of PVDF. Topography (top), PFM phase (middle), and amplitude (bottom) images, after switching the polarisation upward in the central 5 × 5 μm² area of a 2 L-thick (left) and 1 L-thick (right) PVDF films. Scale bar, 1 mm. (b) Three-dimensional schematic diagram of PVDF FTJs. (c) I–V curves in the 1 L and 2 L PVDF FTJs. The arrows show the direction of the voltage sweeps. (d) Local PFM phase and (e) voltage dependences of the TER of an Au/PVDF (1 L)/W junction (left) and an Au/PVDF (2 L)/W junction (right), respectively. The vertical dashed lines show the agreement between polarization and resistance coercive voltages. Reproduced from Ref. [37], copyright 2016, with permission of Springer Nature.

Fig. 7. (a) Evolution of the junction resistance as a function of voltage amplitude in an Au/P(VDF-TrFE)/Nb:SrTiO₃ FTJ. (c), (d) Programmable conductance, corresponding to LTP/D of synaptic weight, is achieved by modulating either amplitude (b) or number (c) of applied voltage pulses. (d) Measurements of LTP/D. (e) Measurements of Hebbian and anti-Hebbian STDP learning rules. Reproduced from Ref. [40], copyright 2019, with permission of John Wiley and Sons.

Fig. 8. (a) Sketch of Pt/BaTiO₃/Nb:SrTiO₃ FTJs. (b) Linear and symmetric conductance update with 200 states and 500 reproducible cycles. (c) Schematic diagram of a three layers neural network (left) and neural core with a crossbar structure to perform the analog matrix operations (right). (d) The simulation results, the training accuracy of BaTiO₃ FTJs and SrTiO₃ based resistive devices for a small image (left) and a large image (right). Reproduced from Ref. [45], copyright 2019, with permission of John Wiley and Sons.

Fig. 9. (a) The schematic diagram of high-density 3D vertical HZO-based FTJS array with high resolution transmission electron microscopy image of the 3D TiN/ HZO/Pt devices. (b) Measurements of Hebbian and anti-Hebbian STDP rule in the HZO-based synaptic array. The red lines are the exponential fits to the experimental data. (c) The schematic diagram of multilayer perceptron network (left), and simulated output signal in which “correct” class of the applied letter patterns is larger than the other “false” outputs after learning process (right). Reproduced from Ref. [36], copyright 2018, with permission of RSC.

Fig. 10. (a) Schematic diagram of charge distribution and energy-band diagrams of a Pt/BiFeO₃/Nb:SrTiO₃ FD at low resistance state. (b) Schematic diagram of charge distribution and energy-band diagrams of a Pt/BiFeO₃/ Nb:SrTiO₃ FD at high resistance state. Reproduced from Ref. [68], copyright 2013, with permission of AIP Publishing.

Fig. 11. (a) Schematic diagram of Au/BaTiO₃/SmNiO₃ FDs. (b) Off-pulse R–V_write curves in an Au/BaTiO₃/SmNiO₃ FD. (c) DC I–V curves in an Au/BaTiO₃/SmNiO₃ FD. (d) Local PFM hysteresis loops of an Au/BaTiO₃/SmNiO₃ FD. Reproduced from Ref. [76], copyright 2019, with permission of AIP Publishing.

Fig. 12. (a) The lower half part is out-of-plane phase image and the upper half part is the corresponding current mapping with read voltage of –0.5 V measured on BiFeO₃/SrRuO₃/ SrTiO₃ (substrate). (b) Out-of-plane phase images after heating the sample at 25 °C, 300 °C, and 500 °C for 5 min, respectively. (c) R–V hysteresis loops of an Au/BiFeO₃/SrRuO₃ FD at –170 °C, 25 °C, 100 °C, 200 °C, and 300 °C, respectively. Reproduced from Ref. [69], copyright 2019, with permission of IOP Publishing.

Fig. 13. (a) Schematic structure of an HZO FeFET. (b) Transfer curve of the HZO FeFET. (c) LTP/D properties of the HZO FeFET with incremental pulse scheme. (d) Schematic illustration of two-layer perceptron neural network for simulation of pattern recognition. Reproduced from Ref. [83], copyright 2019, with permission of ACS.

Fig. 14. (a) Sketch of a biological synapse. (b) Sketch of an MoS₂ FeFET with ferroelectric P(VDF-TrFE) gate insulator. Note that the input port can be either the gate-source/drain port or the drain-source port. For supervised learning in general SNN, the channel usually connects pre and post synaptic neurons while the gate terminal accepts signals to modulate the channel conductance. (c) Channel conductance versus gate electric field curves in a MoS₂ FeFET. (d) Gate current versus gate electric field curve of the MoS₂ FeFET. (e) Evolution of channel conductance as a function of the different voltage pulse sequences. (f) Measurements of Hebbian STDP learning rule in a MoS₂ FeFET. Reproduced from Ref. [1], copyright 2019, with permission of John Wiley and Sons.

Fig. 15. (a) Schematic view that when the polarization is upward/downward, the graphene channel becomes hole/electron dominated due to different positions of Fermi levels within the graphene energy bands. (b) The channel conductance will be decreased/increased due to reduction/enhancement of hole/electron density caused by the corresponding change of ferroelectric polarization. (c) A remote supervise method (ReSuMe) module composed of graphene FeFET complementary synapses, leaky integrate-and-fire (LIF) neuron, and supervise circuits (left). Time chart of signals (right). (d) Sketch of single-layer perceptron for classification of 3 × 3 binary images of z, v, and n, where classification is represented by the different timings of the output neuron. (e) The simulation results, the evolution of output signals, where output timings for z, v, and n inputs gradually approach the desired timings labeled by dash lines. Reproduced from Ref. [85], copyright 2019, with permission of Springer Nature.

Table 1. Experimental results of FeFET synapses.

Table 2. Radar chart to summarize perspectives for the FTJs, FDs, and FeFETs as electronic synapses.