• Microelectronics
  • Vol. 52, Issue 2, 301 (2022)
ZOU Peizhe1、2, WANG Yonglu2、3, and YI Zhou1
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.210240 Cite this Article
    ZOU Peizhe, WANG Yonglu, YI Zhou. A 12 bit 1.6 GS/s Folding and Interpolating A/D Converter Based on 0.13 μm SiGe BiCMOS Process[J]. Microelectronics, 2022, 52(2): 301 Copy Citation Text show less

    Abstract

    A high speed and high precision folding and interpolating A/D converter based on 013 μm SiGe BiCMOS process was proposed. A new sampling/holding circuit based on SEF switch was adopted to fix the voltage in the holding stage, thus realizing signal sampling with high speed, high precision and high linearity. The folding amplifier with emitter follower was adopted to form a four-level cascade structure of average folding and annular interpolation, which reduced the number of comparators, the settling time and the overall power consumption. A new two-stage comparator was used to isolate analog and digital signals and optimize kickback noise. The use of small size transistors reduced the regeneration time. Under 3.3/5 V power supply and 0.13 μm SiGe BiCMOS process, the folding and interpolating A/D converter achieved a sampling rate of 1.6 GS/s, a SFDR of 71.3 dB, a SNDR of 63.6 dB and a ENOB of 10.27 bit.
    ZOU Peizhe, WANG Yonglu, YI Zhou. A 12 bit 1.6 GS/s Folding and Interpolating A/D Converter Based on 0.13 μm SiGe BiCMOS Process[J]. Microelectronics, 2022, 52(2): 301
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