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[2] Vardaman J. Flip Chip and Wafer Level Packaging Trends and Market Forecasts. Techsearch, Austin, TX, USA, 2008

[3] Baron J, Yannou J M. Wafer Level Packaging: Technologies, Applications and Markets, Yole Development, Lyon, France, 2010

[4] Lee K H, Lee S W R. Screen printing of yellow phosphor powder on blue light emitting diode (LED) arrays for white light illumination. In: Proceedings of InterPACK’07, Vancouver, Canada, 2007, 19-24

[5] Zhang R, Lee S W R. Wafer level LED packaging with integrated DRIE trenches for encapsulation. In: Proceedings of the 9th International Conference on Electronic Packaging Technologies & High Density Packaging (ICEPT-HDP), Shanghai, China. 2008, 1-6

[6] Chen K, Zhang R, Lee S W R. Integration of phosphor printing and encapsulant dispensing processes for wafer level LED array packaging. In: Proceedings of the 11th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), Xian, China. 2010, 1386-1392

[7] Zhang R, Lee S W R, Xiao D G, Chen H. LED packaging using silicon substrate with cavities for phosphor printing and copper-filled TSVs for 3D interconnection. In: Proceedings of the 61st Electronic Components & Technology Conference (ECTC), Orlando, FL. 2011, 1616-1621

[8] Park J H, Lee S J, Choi S M.Wafer level bonding for LED packaging using six sigma methodology. Solid State Phenomena, 2007, 124-126: 519-522