A multi-source energy harvesting power management chip was designed in a high-voltage 0.6 μm CMOS process, which could harvest piezoelectric energy and photovoltaic energy at the same time. The harvesting chip comprised a photovoltaic interface circuit, a piezoelectric interface circuit, and a DC-DC circuit. The global maximum power tracking circuit was used in the photovoltaic interface circuit to reduce the influence of shadows on the harvested photovoltaic energy of the solar panel and to improve the maximum power tracking efficiency. The DC-DC circuit used the control mode with adjustable on-time and frequency to achieve higher efficiency in the broader input power range while maintaining a more minor voltage ripple at the output. The simulation results show that the harvesting chip’s overall average dynamic current is 7.6 μA, and the energy conversion efficiency is the highest at 91.2%. The layout size is 9 623 μm×3 655 μm.