• Chinese Journal of Quantum Electronics
  • Vol. 42, Issue 1, 111 (2025)
LU Yekai, BAI Enjian*, JIANG Xueqin, WU Yun, and CHEN Genlong
Author Affiliations
  • College of Information Science and Technology, DongHua University, Shanghai 201620, China
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    DOI: 10.3969/j.issn.1007-5461.2025.01.011 Cite this Article
    Yekai LU, Enjian BAI, Xueqin JIANG, Yun WU, Genlong CHEN. FPGA implementation of high‐speed privacy amplification algorithm based on cellular automata[J]. Chinese Journal of Quantum Electronics, 2025, 42(1): 111 Copy Citation Text show less
    Privacy amplification flow chart
    Fig. 1. Privacy amplification flow chart
    CA-based privacy amplification algorithm
    Fig. 2. CA-based privacy amplification algorithm
    FPGA modular design diagram for privacy amplification scheme
    Fig. 3. FPGA modular design diagram for privacy amplification scheme
    FPGA sequence diagram of group reconciliation key processing
    Fig. 4. FPGA sequence diagram of group reconciliation key processing
    FPGA sequence diagram of pipelined structure for group reconciliation key
    Fig. 5. FPGA sequence diagram of pipelined structure for group reconciliation key
    FPGA pipeline structure design diagram of privacy amplification scheme
    Fig. 6. FPGA pipeline structure design diagram of privacy amplification scheme
    FPGA sequence diagram of pipelined structure for privacy amplification scheme
    Fig. 7. FPGA sequence diagram of pipelined structure for privacy amplification scheme
    Schematic diagram of privacy amplification improved scheme
    Fig. 8. Schematic diagram of privacy amplification improved scheme
    FPGA sequence diagram of improved pipeline structure for privacy amplification scheme
    Fig. 9. FPGA sequence diagram of improved pipeline structure for privacy amplification scheme
    Input flip/bitsOutput flip scale (original)/%[18]Output flip scale (improved)/%
    149.950.1
    249.649.9
    349.649.6
    449.849.7
    549.650.2
    Table 2. A valanche effect test
    CA orderCompression rateRK bandwidth/(Mbits⋅s-1)Secure key rate/(Mbits⋅s-1)
    640.16400640
    0.264001280
    0.564003200
    1280.1128001280
    0.2128002560
    0.5128006400
    2560.1256002560
    0.2256005120
    0.52560012800
    Table 3. Theoretical speed of the privacy amplification scheme
    CA OrderCompression rateRK bandwidth/(Mbits⋅s-1)Secure key rate/(Mbits⋅s-1)
    640.178078
    0.2750150
    0.5740370
    1280.11560156
    0.21530306
    0.51470735
    2560.13150315
    0.23120624
    0.530801540
    Table 4. Testing speed of the privacy amplification scheme
    SchemeDeviceLUTRK bandwidth/(Mbits⋅s-1)
    CA schemeXilinx Artix-726561560
    LU scheme[14]Altera cyclone V21000128
    FFT scheme[15]Xilinx virtex-637203116
    Table 5. Comparison of privacy amplification schemes
    Yekai LU, Enjian BAI, Xueqin JIANG, Yun WU, Genlong CHEN. FPGA implementation of high‐speed privacy amplification algorithm based on cellular automata[J]. Chinese Journal of Quantum Electronics, 2025, 42(1): 111
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