A 130-nm ferroelectric nonvolatile system-on-chip for internet of things

IEEE J. Solid-State Circuits, 2019, doi: 10.1109/JSSC.2018.2884349

Nonvolatile processor (NVP) is promising for energy-harvesting-powered internet-of-things (IoT) devices, owing to its unique capability to sustain computation progress over power outages. Recently, NVPs with different nonvolatile memory technologies have been reported, and significant efforts have been made to improve the on/off switching speed and to minimize the power consumption caused by data backup and restore operations. However, a little attention has been devoted to improve the system-level performance when the NVP works in a real-world transient computing system. As a result, the widespread application of NVP faces challenges such as low level of integration and large peripheral restore overheads.

The nonvolatile system-on-chip (NVSoC) presented by Yongpan Liu (Corresponding author, Department of Electronic Engineering, Tsinghua University, Beijing, China), et al. opens the possibility to make transiently-powered IoT devices fast, power-efficient and compact. An on-chip power management subsystem is proposed to minimize the requirement of off-chip components while supporting versatile power policies. And a direct peripheral restore architecture is designed, enabling fast and parallel re-configuration of peripheral devices. A test chip is fabricated in 130-nm ferroelectric-CMOS process, showing more than 6x higher data throughput than previous NVPs.

Zhiyi Yu (School of Electronics and Information Technology, Sun Yat-Sen University, Guangzhou, China)

doi: 10.1088/1674-4926/40/2/020205