With the advent of the era of artificial intelligence, advanced algorithms represented by deep learning algorithms are rapidly developing, driven by big-data resources. This is promoting the extensive application of neural networks in various fields of social development, including computer vision, natural language processing, speech recognition, automatic driving, and biomedicine. In the past two decades, advanced semiconductor technology has led to the creation of various types of computer hardware with excellent performances, which meet the computing capacity resource requirements of neural networks in various fields.
However, with the continuous elevation of social intelligence in the future, neural networks will require even greater computing resources when processing complex tasks. Simultaneously, the machining accuracy of semiconductor process technology has approached the physical limit, and ultra-small on-chip devices are susceptible to quantum tunneling and thermal effects, which may prevent the proper operation of chips manufactured with this machining accuracy. Hence, it will be difficult to continue to increase computing capacity resources by further improving the processing accuracy of semiconductor processes. Consequently, it is imperative to find a new computing paradigm to replace the existing computing architecture to break through this computing-capacity bottleneck.
An optical neural network (ONN) is a high-performance novel computing paradigm that differs from von Neumann computing schemes. It has advantages such as low latency, low power consumption, large bandwidth, and parallel signal processing. Its inference process relies on the diffraction and interference of light, and no additional energy supply is required for the entire calculation process. Compared with traditional electronic hardware, it has natural advantages in performing large-scale linear matrix operations.
This study comprehensively reviews the research progress and challenges related to on-chip integrated ONNs. These are typically designed based on a Mach-Zehnder interferometer (MZI), micro-ring resonator (MRR), or subwavelength unit (SWU). When first introduced, the on-chip ONNs are based on MZIs (Figs.1 and 2), which can achieve matrix operations in the inference process by combining the topological cascading and matrix decomposition methods of MZIs. Next, on-chip ONNs based on MRRs are presented (Figs.3 and 4). MRRs can redistribute the optical power at different frequencies, and the matrix operation function in the ONN inference process can be actualized by cleverly designing the weights at different wavelengths after filtering. Then, on-chip diffractive optical neural networks (DONNs) based on SWUs are introduced (Figs.5 and 6). This kind of ONN can realize the wavefront modulation of the propagating light in the slab waveguide by designing the sizes of the SWUs to obtain specific diffraction results to complete reasoning tasks. Finally, we compare the integration, energy consumption, and computational throughput of on-chip ONNs designed with different structural units based on experiments with integrated ONN chips (Table 1). The above research provides a valuable reference for the exploration of on-chip ONNs.
On-chip ONNs designed based on MZIs or MRRs both have reconfigurable functions, and these basic structural units, MZIs and MRRs, can be further combined with phase change material (PCM) units to achieve nonlinear functions on the ONN chips. However, the matrix scale that these ONNs can handle in parallel is often relatively low. In contrast, an on-chip DONN designed based on SWUs can process large-scale matrices in parallel because of its small size, high integration, and easy large-scale expansion. Nevertheless, it is eminently challenging to implement reconfigurable and nonlinear functions on a DONN chip. Therefore, achieving reconfigurable functions, nonlinear functions, and the parallel processing of large-scale matrices on ONN chips requires joint efforts from multiple disciplines. In the future, the development direction of on-chip ONNs is supposed to be closely related to their practical applications. Meanwhile, it will be better to promote the research of both dedicated on-chip ONNs and general on-chip ONNs. Dedicated on-chip ONNs are designed for specific application scenarios, which may rapidly propel the research progress. Universal on-chip ONNs require an inclusive consideration of the computing architecture, optical operators, optical algorithms, protocol standards, system software, and ecological construction, with the goal of laying a solid foundation for the generalization of ONN chips. With continuous improvements in various disciplines and the deep collaboration of interdisciplinary fields, on-chip ONNs will shine brightly in the upcoming era of artificial intelligence through the joint efforts of researchers in all trades and professions.
