[1] Tao R, Berroth M. 5 GHz voltage controlled ring oscillator using source capacitively coupled current amplifier. In: Proceedings of IEEE Topic Meeting on Silicon Monolithic Integrated Circuits in RF System, 2003, 45-48
[2] Deen M J, Kazemeini M J, Naseh S. Performance characteristics of an ultra-low power VCO. In: Proceedings of the International Symposium on Circuits and Systems, 2003, 697-700
[3] Catli B, Haskell M M. A 0.5 V 3.6/5.2 GHz CMOS multi-band VCO for ultra low-voltage wireless applications. In: Proceedings of IEEE International Symposium on Circuits and Systems. 2008, 996-999
[4] Tu W H, Yeh J Y, Tsai H C, Wang C K. A 1.8 V 2.5-5.2 GHz CMOS dual-input two stage ring VCO. In: Proceedings of IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, 2004, 134-137
[5] Kim H R, Chu C Y, Min Oh S, Yang M S, Lee S G. A very low power quadrature VCO with back-gate coupling. IEEE Journal of Solid-State Circuits, 2004, 39 (6): 952-955
[6] Bero B, Nyathi J. Bulk CMOS device optimization for high-speed and ultra-low power operations. In: Proceedings of 49th IEEE International Midwest Symposium on Circuit and System. 2006, 2: 221-225
[7] Mandal M K, Sarkar B C. Ring oscillators: characteristics and applications. Indian Journal of Pure & Applied Physics, 2010, 48: 136-145
[8] Leung B H. A novel model on phase noise of ring oscillator based on last passage time. IEEE Transactions on Circuits System I: Regular Papers, 2004, 51(3): 471-482
[9] Abidi A A. Phase noise and jitter in CMOS ring oscillator. IEEE Journal of Solid-State Circuits, 2006, 41(8): 1803-1816
[10] Deng H H, Yin Y S, Du G M. Phase noise analysis and design of CMOS differential ring VCO. In: Proceedings of 9th International Conference in Electronic Measurement & Instruments, 2009, 4-731-4-736
[11] Lee S Y, Hsieh J Y. Analysis and implementation of a 0.9 V voltagecontrolled oscillator with low phase noise and low power dissipation. IEEE Transaction on Circuits and Systems II, 2008, 55(7): 624-627
[12] Kumar M, Arya S K, Pandey S. Low power voltage controlled ring oscillator design with substrate biasing. International Journal of Information and Electronics Engineering, 2012, 2(2): 156-159
[13] Fong N, Kim J, Plouchart J O, Zamdmer N, Liu D X, Wagner L, Plett C, Tarr G. A low-voltage 40 GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology. IEEE Journal of Solid-State Circuits, 2004, 39(5): 841-846
[14] Yeop L S, Amakawa S, Ishihara N, Masu K. Low-phasenoise widefrequency-range ring-VCO-based scalable PLL with sub harmonic injection locking in 0.18 m CMOS. In: Proceedings of IEEE International Microwave Symposium Digest, 2010, 1178-1181
[15] Paula L S, Banpi S, Fabris E, Susin A A. A wide band CMOS differential voltage-controlled ring oscillators. In: Proceedings of International IEEE Northeast Workshop on Circuits and System Design, 2008, 9-12
[16] Mangalam H, Gunavathi K. Gate and subthreshold leakage reduction SRAM cells. DSP Journal 2006, 6(1): 51-55
[17] Huang S Z, Lin W, Wang Y T, Zheng L. Design of a voltage controlled ring oscillator based on MOS capacitances. In: Proceedings of the International MultiConference of Engineers and Computer Scientists, 2009, 2
[18] Yang S G, Wong K K Y, Chen M H, Xie S Z. Fiber optical parametric oscillator based on highly nonlinear dispersion-shifted fiber. Frontiers of Optoelectronics, 2013, 6(1): 25-29