Photonic integrated circuits (PICs) fabricated in the silicon-on-insulator (SOI) platform are essential for massive applications in communications, military, and sensing. Due to its CMOS compatibility and ultra-high index contrast in the SOI platform, the PICs can be fabricated with low cost and compact footprint^[1–4]. Polarization splitter-rotators (PSRs) are one of the key components in PICs to overcome the highly polarization-dependent issue brought by the silicon waveguide. Typically, the PSR combines the functions of the polarization beam splitter (PBS) and polarization rotators (PRs)^[5], so the incident light with orthogonal polarization can be separated and rotated on one of them. Thus, the PSRs are widely used to meet significant requirements for polarization processing and multiplexing. Recently, various PSRs have been proposed with different structures, such as the mode-sorting asymmetric Y-junction^[6,7], multimode interferometer^[8,9], and asymmetric directional coupler (ADC)^[10–13]. Among them, the PSRs fabricated by the ADC structure have advantages on performance, footprint, and design flexibility. However, this type of PSR is sensitive to fabrication errors. To address this problem, several novel concepts have been incorporated into the ADC structures, such as subwavelength grating (SWG), hybrid plasmonic waveguide, and quasi-adiabatic couplers. A PSR based on the SWG-ADC structure was numerically proposed^[14], improving the fabrication tolerance from $\pm 3\mathrm{nm}$ to $\pm 40\mathrm{nm}$ for waveguide width. A hybrid plasmonic-dielectric-based PSR is also demonstrated in Ref. [15]. Using this structure, the PSR obtains an ultra-high extinction ratio [ER, more than 58 dB for the transverse magnetic (TM) polarization mode]. However, the hybrid plasmonic is complicated to realize under current commercial tape-out processing conditions. Therefore, a better choice is to use a quasi-adiabatic taper coupler. A PSR comprising a silicon wire waveguide coupled to a taper-etched waveguide is designed^[16], such that the partially etched taper can compensate for fabrication errors. The ER reaches 30 dB within a 160 nm bandwidth. Nevertheless, the footprint beyond 200 µm is too large to meet the stringent requirements for compactness.

In this Letter, we design two novel PSRs, and one sample of them is fabricated by using electron-beam lithography (EBL). Both PSRs are dual etched in the through-port waveguide. The first level taper etching is used to meet the phase matching condition, for achieving the high-efficiency cross coupling between the ${\mathrm{TM}}_0$ mode in the etching region and the transverse electric (${\mathrm{TE}}_0$) mode in the other waveguide. Then, after an S bend section, the etched width is gradually increased, and the full etching is formed. In this region, the residual ${\mathrm{TM}}_0$ mode will leak into the ${\mathrm{SiO}}_2$ substrate. A reverse taper-etched structure is used at the end of the through port to restore the waveguide thickness to 220 nm. The cross-port waveguides of two PSRs are SWG and nanowire waveguide. One PSR is fabricated and tested, showing an ER of more than 20 or 28 dB over 1510–1580 nm for ${\mathrm{TE}}_0$ or ${\mathrm{TM}}_0$ modes. For a launched ${\mathrm{TE}}_0$ mode, the insertion loss (IL) is less than 0.6 dB within the 70 nm bandwidth. For a launched ${\mathrm{TM}}_0$ mode, the polarization conversion loss (PCL) is less than 1 or 3 dB within the bandwidth of 45 or 70 nm, respectively.

The ultra-compact PSRs are designed based on the ADC structure. The top cladding of the PSR is specified as air to achieve a more compact footprint^[17]. The schematic diagrams of the two PSRs are shown in Fig. 1. The through-port waveguides of two PSRs are both dual etched. The first stage is partially etched, and a tapered coupler is formed in the coupling region. An S bend section is used to decouple at the end of the coupling region. Meanwhile, the etching width remains unchanged until arriving at the end of the S bend. Then, the etched width is gradually increased, and it finally forms a full etching. Right now, the waveguide supports a single mode, and only the ${\mathrm{TE}}_0$ mode can be guided in this port. A reverse taper is used to recover the waveguide thickness. The cross-port waveguide might be an SWG or a nanowire, as shown in Figs. 1(a) and 1(b).

For the two PSRs, ${\mathit{W}}_1$ is set as 0.628 µm. According to the fabrication process requirements, the etching depth is specified to be 70 nm. Since the cross-port waveguide should be phase matched with the through-port waveguide, the variation of the ${\mathrm{TE}}_0$ and ${\mathrm{TM}}_0$ effective refractive indices is investigated, with the etching width in the through-port waveguide. The effective refractive index of the ${\mathrm{TM}}_0$ mode is between 1.45 and 1.7. Meanwhile, the equivalent material refractive index of the SWG waveguide can be calculated by a simplified model^[18], $$\mathrm{\Delta }{n}_{\mathrm{eq}}=\delta ·\mathrm{\Delta }n,$$(1)where $\mathrm{\Delta }{n}_{\mathrm{eq}}$ is the refractive index difference between the equivalent material and air cladding, $\delta$ is the duty cycle, and $\mathrm{\Delta }n$ is the refractive index difference between the silicon and air cladding. According to this relationship, we first determine ${\mathit{W}}_3=0.522\mathrm{\mu m}$ in PSR-1, and the end width of taper ${\mathit{W}}_2$ is optimized as 0.32 µm to avoid the ${\mathrm{TM}}_0-{\mathrm{TM}}_0$ coupling between two waveguides. The SWG has a period of 0.3 µm and a duty-cycle of 0.7. With these values, we sweep the coupling length, and the result is shown in Fig. 2. It is clear that the optimal coupling length is 14.8 µm.

For the nanowire waveguide in PSR-2, ${\mathit{W}}_3=0.3\mathrm{\mu m}$ and ${\mathit{W}}_2=0.36\mathrm{\mu m}$ are specified. With this condition, we sweep the length of L_c with different gaps, as shown in Fig. 3. The conversion loss reaches the minimum value when ${\mathit{L}}_{\mathit{c}}=6.2\mathrm{\mu m}$ and $g=100\mathrm{nm}$.

Figure 4 shows the conversion efficiency at the cross port and the through port of PSR-1 and PSR-2. Clearly, the ER is higher than 15 dB and 25 dB, and the loss is lower than 1 dB and 0.3 dB within the 130 nm and 20 nm bandwidth for PSR-1, respectively. For PSR-2, the obtained ER is higher than 15 dB, 20 dB, or 30 dB, while the loss is lower than 0.4 dB, 0.9 dB, or 1 dB within the bandwidth of 33 nm, 100 nm, or 150 nm, as shown in Figs. 4(c) and 4(d).

To reveal the fabrication tolerance of the two PSRs, we keep the center position constant and synchronously change the waveguide width. The results are shown in Fig. 5. PSR-1 and PSR-2 have $\pm 20\mathrm{nm}$ or $\pm 10\mathrm{nm}$ fabrication tolerance, respectively. Compared with PSR-2, PSR-1 based on the SWG waveguide has a larger fabrication tolerance in terms of PCL, but its errors on duty cycle will distort the performance. On the other hand, PSR-2 has better ER performance in a wider bandwidth.

Based on the above analysis, we fabricated the PSR-2 within a $4\mathrm{mm}\times 4\mathrm{mm}$ SOI wafer, which has a 220 nm silicon layer and a 3 µm ${\mathrm{SiO}}_2$ substrate. The EBL was used to define the patterns of grating couplers on the ZEP520A resist^[19]. Then, the patterns were transferred to the top silicon layer by inductively coupled plasma (ICP) dry etching with a 70 nm etching depth, using ${\mathrm{SF}}_6$ and ${\mathrm{C}}_4{\mathrm{F}}_8$ gases. Second, the PSR structures were patterned on the wafer by EBL and ICP etching with a full etch depth of 220 nm. The scanning electron microscope (SEM) image of the fabricated PSR samples is shown in Fig. 6.

We designed two vertical coupling gratings for supporting the ${\mathrm{TE}}_0$ and ${\mathrm{TM}}_0$ modes, respectively. The period and filling factor of the ${\mathrm{TE}}_0$ grating coupler are designed as 620 nm and 45%, while 1050 nm and 47% are for the corresponding ${\mathrm{TM}}_0$ grating coupler. During the performance tests, several ${\mathrm{TE}}_0–{\mathrm{TE}}_0$ and ${\mathrm{TM}}_0–{\mathrm{TM}}_0$ reference waveguides are fabricated, and their transmission responses are shown in Fig. 7. It can be found that coupling losses of ${\mathrm{TE}}_0$ and ${\mathrm{TM}}_0$ grating couplers are 7.7 dB/port and 11.4 dB/port at the center wavelength, respectively.

The experiment and simulation results for PSRs are shown in Fig. 8, after being calibrated with the reference waveguide. The IL of the ${\mathrm{TE}}_0$ mode in through port is less than 0.6 dB within the bandwidth of 1510–1580 nm, while the ER is higher than 20 dB. The ${\mathrm{TM}}_0–{\mathrm{TE}}_0$ conversion efficiency reaches the maximum of 96% at $\lambda =1550\mathrm{nm}$, with a PCL of 0.18 dB. In the 1535–1580 nm range, the PCL is less than 1 dB, and the ER is larger than 28 dB.

In addition, a comparison among similar PSRs recently reported is listed in Table 1. It is clear that the fabricated PSR-2 has excellent comprehensive characteristics in compact footprint, PCL, ER, and bandwidth, particularly the highest ER of 28 dB within the 45 nm bandwidth.

We have designed two novel PSRs based on the dual-etched and tapered ADC. The ${\mathrm{TM}}_0-{\mathrm{TE}}_0$ conversion is fulfilled by taper etching in the coupling region, and the residual ${\mathrm{TM}}_0$ mode is filtered out by the second stage etching. Using the EBL, PSR-2 is fabricated and tested. Experiment results show a maximum IL of 0.6 dB and a minimum ER of 20 dB within the 70 nm bandwidth for the ${\mathrm{TE}}_0$ mode. For ${\mathrm{TM}}_0-{\mathrm{TE}}_0$ conversion, the ER is higher than 28 dB over the 1510–1580 nm range, and the PCL is less than 1 dB within the 45 nm bandwidth.