Youcheng Wu, Gaomin Liu, Hongliang He, Jianjun Deng, Wenfeng Dai, and Chuanjun Feng
Fig. 1. Circuit schematic of an energy-storage inductor and an EEOS powered by a high current-mode EDFEG
Fig. 2. Simulation waveforms of inductance current IL and load voltage Ud without parallel capacitors
Fig. 3. Simulation waveforms of inductance current and load voltage when a 300 nF capacitor is connected in parallel
Fig. 4. Circuit schematic of an energy-storage inductor and an EEOS powered by a high voltage-mode EDFEG
Fig. 5. Simulation waveforms of output current of EDFEG and charging voltage of the capacitor
Fig. 6. Optimized waveform of load voltage powered by high-voltage mode EDFEG
Fig. 7. Simulation load voltages UR for different inductances
Fig. 8. Experimental inductor current IL, load voltage UR and load current IR
Fig. 9. Experimental output current IEDFEG of EDFEG and charging voltage (UC) of the capacitor
Fig. 10. Experimental inductor current IL, diode voltage Ud and diode current IR powered by the EDFEG
I0/kA
| IL/kA
| U0/kV
| m×n | Ashock/cm2 | | IL/kA
| U0/kV
| m×n | Ashock/cm2 | | IL/kA
| U0/kV
| m×n | Ashock/cm2 | L=0.2 μH
| L=1.0 μH
| L=2.0 μH
| 5.0 | 7.9 | 5.8 | 114×1 | 70 | | 8.3 | 21.6 | 114×3 | 210 | | 8.9 | 45.8 | 114×7 | 490 | 7.5 | 11.8 | 9.7 | 170×2 | 204 | | 13.1 | 28.2 | 170×4 | 408 | | 13.4 | 63.2 | 170×9 | 918 | 15 | 23.5 | 17.4 | 340×3 | 612 | | 26.2 | 54.3 | 340×8 | 1632 | | 26.5 | 120.6 | 340×25 | 4335 |
|
Table 1. Simulation results of the current through the inductance and design parameters of the EDFEG
I0/kA
| N | l/mm
| Ud/kV
| τ/ns
| | N | l/mm
| Ud/kV
| τ/ns
| | N | l/mm
| Ud/kV
| τ/ns
| L=0.2 μH
| L=1.0 μH
| L=2.0 μH
| 5.0 | 3 | 20 | 58 | 17 | | 5 | 60 | 109 | 37 | | 5 | 90 | 150 | 60 | 7.5 | 5 | 30 | 74 | 15 | | 7 | 90 | 160 | 38 | | 9 | 130 | 213 | 61 | 15.0 | 9 | 50 | 140 | 16 | | 14 | 160 | 320 | 36 | | 15 | 280 | 434 | 62 |
|
Table 2. Optimized parameters of EEOS and simulation results of the voltage and pulse width
C/nF
| Uc/kV
| N | l/mm
| Ud/kV
| τ/ns
| | N | l/mm
| Ud/kV
| τ/ns
| | N | l/mm
| Ud/kV
| τ/ns
| L=0.3 μH
| L=0.4 μH
| L=1.0 μH
| 15.1 | 100 | 4 | 90 | 256 | 19 | | 4 | 90 | 238 | 22 | | 4 | 100 | 182 | 62 | 18.7 | 90 | 5 | 90 | 245 | 19 | | 4 | 90 | 224 | 24 | | 4 | 100 | 176 | 64 | 22.7 | 85 | 5 | 90 | 239 | 20 | | 5 | 90 | 220 | 26 | | 4 | 100 | 172 | 67 |
|
Table 3. Simulation results with EDFEG in high-voltage mode
l/mm
| Ud/kV
| τ/ns
| | l/mm
| Ud/kV
| τ/ns
| | l/mm
| Ud/kV
| τ/ns
| L=300 nH,N=4
| L=400 nH,N=4
| L=1000 nH,N=3
| 80 | 206 | 20 | | 80 | 190 | 25 | | 90 | 144 | 56 |
|
Table 4. Simulation results with parameters 75 kV/17.5 nF of the capacitor
item | Ud/kV
| tr/ ns
| τ/ns
| | Ud/kV
| tr/ ns
| τ/ns
| | Ud/kV
| tr/ ns
| τ/ns
| L=298 nH,N=4
| L=397 nH,N=4
| L=445 nH,N=4
| simulation
results
| 193 | 3.5 | 19 | | 174 | 3.7 | 24 | | 163 | 4.2 | 27 | experiment results | 167 | 3.6 | 25 | | 157 | 3.5 | 32 | | 147 | 3.3 | 39 |
|
Table 5. Simulation results and experimental results with parameters 75 kV/17.5 nF of the capacitor