• Electronics Optics & Control
  • Vol. 26, Issue 10, 106 (2019)
XIE Wentao and WANG Rui
Author Affiliations
  • [in Chinese]
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    DOI: 10.3969/j.issn.1671-637x.2019.10.021 Cite this Article
    XIE Wentao, WANG Rui. High-Integrity Computer System Design Based on Hierarchical Fault-Tolerant Technology[J]. Electronics Optics & Control, 2019, 26(10): 106 Copy Citation Text show less
    References

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    [6] 】KOPETZ H. The time-triggered architecture[J]Proceedings of the IEEE, 2003, 91(1): 112-126.

    [8] DOERENBERG F M G, TOPIC M. Fault tolerant data communication network:US7206877B1[P]. 2002-10-15.

    XIE Wentao, WANG Rui. High-Integrity Computer System Design Based on Hierarchical Fault-Tolerant Technology[J]. Electronics Optics & Control, 2019, 26(10): 106
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