VXI bus is a protocol being widely used in auto-testing and other multi-instruments system. In this paper, the characteristics of the protocol are analyzed, and a modularizing approach is proposed based on its ability of tailoring. On the basis of this, a modularized message-based VXI bus interface logic is implemented in FPGA. The design heritability is enhanced greatly. To prove the reliability and validity of the approach, the simulated timing diagrams generated by FPGA are presented. It is used in a multi-DSPs real-time image processing system, in which the VXI bus interface logic is used for system resource management and simple message interaction between modules. At the end of the paper, a real tested bus timing diagrams are presented to prove that the proposed approach and its implementation can provide satisfying bus bandwidth.