Yi LI, Wenlong WEN, Qianhao WANG, Qianglong LI, Hualong ZHAO, Feng LI. Sub-nanosecond Rising-edge Narrow Pulse Driver Circuit and Analog Simulation[J]. Acta Photonica Sinica, 2024, 53(10): 1014002
- Acta Photonica Sinica
- Vol. 53, Issue 10, 1014002 (2024)
Fig. 1. Circuit systems design
Fig. 2. Gate delay method to generate pulses
Fig. 3. Main charging and discharging circuit design
Fig. 4. Driver circuit for laser diodes
Fig. 5. Temperature and compensation network circuits
Fig. 6. Temperature control circuit schematic
Fig. 7. Temperature control circuit schematic
Fig. 8. Peripheral circuit pulse simulation diagram
Fig. 9. FPGA output pulse width
Fig. 10. Minimum pulse width
Fig. 11. The output repetition frequency of FPGA
Fig. 12. Simulation of Si-based MOSFET and drivers
Fig. 13. Simulation of GaN FET integrated circuits
Fig. 14. Simulated waveforms for capacitance changes
Fig. 15. Simulated waveform of resistance change
Fig. 16. Simulated waveforms for inductance changes
Fig. 17. Simulation of Si-based MOSFET with driver joining transmission characteristics
Fig. 18. Transmission characteristics of conductors
Fig. 19. Introduction of inductive analog leads in the discharge circuit
Fig. 20. Semiconductor laser parallel capacitance
Fig. 21. The output pulse of MOSFET drain
Fig. 22. Semiconductor laser side pulse output
Fig. 23. The output laser pulse of semiconductor laser
Fig. 24. Spectrogram of seed signals
Fig. 25. Power stability test chart
|
Table 1. Electrical characterization of GaN FET integrated circuits
|
Table 2. TEC parameters
|
Table 3. Seed source temperature control parameters
|
Table 4. 10 groups of pulse idth values
|
Table 5. Operating parameters of LD
Set citation alerts for the article
Please enter your email address
© Copyright 2018-2021 | Chinese Laser Press. All Rights Reserved 沪ICP备15018463号-20