Design of driving schedule is important for CCD to perform well. A driving schedule design based on FPGA (field programmable gate array) is put forward for the scientific grade CCD47-20 BI AIMO (advanced inverted mode operation) of e2v Company. This design is developed on the FPGA-APA600 hardware platform using Verilog language in LiberoIDE v9.0 development environment, and simulated in ModelSim6.0. Image acquisition experiments were implemented with the image collection card of Matrox Company. The experiment indicated that the CCD performed stably, and the design met the driving requirements of CCD47-20 BI AIMO. The result has been applied to CCD readout circuit of spatial heterodyne interferometer for oxygen detection with good performance.