With the advantages of speediness, lossless and high-efficiency, the technology of Near-infrared (NIR) spectroscopy can be applied to the applications of composition analysis. In recent years, the development of portable micro-spectrometer and spectral sensing Internet of Things has promoted the application of spectral analysis technology to field analysis and online detection. The NIR spectral sensors with High Dynamic Range (HDR) and anti-interference capability are required. Digital Readout Circuit (DROIC) can optimize the quality of readout signal and improve the performance of NIR focal plane array effectively. Pulse Frequency Modulation (PFM) DROIC can convert the photocurrent of detector into digital pulses by resetting the integrating capacitor repeatedly in integrating period. PFM structure is a feasible technique for HDR DROIC, because it breaks the limitation of charge capacity determined by integrating capacitance and power supply voltage in conventional readout circuits. Due to process limitations, the residual charge on integrating capacitor after the last reset cycle can cause conversion errors. In addition, there are some problems such as poor linearity under strong light environment. Various methods have been proposed to resolve the problems of linearity and conversion errors. InGaAs Focal Plane Arrays (FPAs) have the advantages of working near-room temperature, high detection rate, good uniformity and stability, which is beneficial to realize the miniaturization design of the NIR photoelectric system. Most InGaAs detectors use the Capacitance Feedback Trans-impedance Amplifier (CTIA) input stage, but there are relatively few researches on the PFM ROIC of CTIA input stage currently.A two-step Residual-time-counting Pulse Frequency Modulation (RTC-PFM) DROIC was proposed for CTIA input stage of InGaAs FPAs to improve the dynamic range. The non-ideal reset of CTIA input stage in PFM DROIC is studied. The PFM conversion theory model of CTIA input stage is established. The conversion error caused by residual charges of integral capacitor and the non-linearity caused by reset missing charges are analyzed in detail. Theoretical analysis shows that the conversion error caused by residual charges is more obvious only in the case of small integral current. On the contrary, the non-linearity of the conversion values caused by the missing charge gradually deteriorates with the increase of the integral current.A two-step RTC-PFM digital structure with double integral capacitances was designed for 256×1 linear spectral sensor. With the improvement of conversion error, the fusion of 16-bit rough conversion and maximum 16-bit fine conversion is realized. The coarse conversion is accomplished by pulse counting and the fine conversion is implemented by time counting of high frequency clock. In order to improve the non-linearity caused by the missing charges, the most direct measure is to reduce the reset times. The DROIC adopts 50 fF (C_min) and 1 pF (C_min+C_max) integrating capacitors, which can be chosen by an external signal SEL. In low light mode, a small integrating capacitor is used to improve the conversion accuracy. In strong light mode, a larger integrating capacitor is used with the purpose of control the number of integration-reset times, which is related to non-linearity of conversion. At the same time, the residual time counting two-step structure can ensure high resolution performance even with large integrating capacitance. The simulation results show that the actual converted characteristics are consistent with the theoretical analysis. The actual converted values show very typical logarithmic properties due to the effect of the reset charge loss. The comparative analysis proves that the precise time counting can obviously reduce the conversion error caused by the residual charge of the integral capacitor. In the simulation, the non-linear degree of conversion value is 0.62% and 0.06% respectively when the small integrating capacitor and the large integrating capacitor are used in the large integrating current. The linearity is significantly improved when the large integrating capacitor is selected. Furtherly, the layout of RTC-PFM DROIC unit was implemented with the size of 90 μm×200 μm.This paper firstly introduces the non-ideal reset of PFM DROIC and established the PFM conversion theory model of CTIA input stage. In order to improve the conversion accuracy and linearity, a RTC-PFM DROIC was proposed for CTIA input stage of InGaAs FPAs. With the fusion of rough conversion and fine conversion, RTC-PFM DROIC can get a performance boost on conversion accuracy. The analysis and simulation show that it is beneficial to field application of short-wave infrared spectral sensors.