• Semiconductor Optoelectronics
  • Vol. 43, Issue 4, 777 (2022)
LI Li
Author Affiliations
  • [in Chinese]
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    DOI: 10.16818/j.issn1001-5868.2021121802 Cite this Article
    LI Li. Design for Charge Handling Capacity of Sense Node in CCDs[J]. Semiconductor Optoelectronics, 2022, 43(4): 777 Copy Citation Text show less

    Abstract

    In this paper, the handling capacity of sense node was designed based on CCDs full well charge capacity and the work voltage range of the on-chip amplifier, and the expressions for the optimizing design of the handling capacity of sense node was deduced. As can be seen from the expressions, besides matching the transferring of the full well charge for the CCD, the voltage change range of sense node inducted by the signal charge also must be in the linear region of the on-chip amplifier so that the CCDs output nonlinearity and full well charge capacity will not be affected. Therefore, the CCD designers must consider not only the sense nodes capacitance, but also the MOSFETs wide-length ratio, threshold voltage, work voltage etc. of the on-chip amplifier during the design of charge handling capacity of sense node.
    LI Li. Design for Charge Handling Capacity of Sense Node in CCDs[J]. Semiconductor Optoelectronics, 2022, 43(4): 777
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