• Microelectronics
  • Vol. 53, Issue 5, 794 (2023)
SHAO Xuefan1, LIU Ke2, YIN Feifei1, and LIU Xinghui1
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.220481 Cite this Article
    SHAO Xuefan, LIU Ke, YIN Feifei, LIU Xinghui. A High Speed Dynamic Comparator for SerDes Receiver DFE[J]. Microelectronics, 2023, 53(5): 794 Copy Citation Text show less
    References

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    [3] MASTAN S S K, SATYA P K, VENKATA R D. Adaptive decision feedback equalizer with dynamic principle for echo cancellation [J]. Transactions of the Institute of Measurement and Control, 2018, 40(16): 4455-4471.

    [4] THAJ T, VITERBO E. Low complexity iterative rake decision feedback equalizer for zero-padded OTFS systems [J]. IEEE Transactions on Vehicular Technology, 2020, 69(12): 15606-15622.

    [5] SANGEETHA R, VIDHYASHRI A, REENA M, et al. An overview of dynamic CMOS comparators [C]// 2019 5th International Conference on Advanced Computing & Communication Systems (ICACCS). Coimbatore, India. 2019: 1001-1004.

    [6] CHEVELLA S, O’HARE D, O’CONNELL I. A low-power 1-V supply dynamic comparator [J]. IEEE Solid-State Circuits Letters, 2020, 3: 154-157.

    [9] XU D, XU S, CHEN G. High-speed low-power and low-power supply voltage dynamic comparator [J]. Electronics Letters, 2015, 51(23): 1914-1916.

    [13] WANG Y, YAO M, GUO B, et al. A low-power high-speed dynamic comparator with a transconductance-enhanced latching stage [J]. IEEE Access, 2019, 7: 93396-93403.

    [17] MIYAHARA M, ASADA Y, PAIK D, et al. A low-noise self-calibrating dynamic comparator for high-speed ADCs [C]// 2008 IEEE Asian Solid-State Circuits Conference. Fukuoka, Japan. 2008: 269-272.

    SHAO Xuefan, LIU Ke, YIN Feifei, LIU Xinghui. A High Speed Dynamic Comparator for SerDes Receiver DFE[J]. Microelectronics, 2023, 53(5): 794
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