• Chinese Optics Letters
  • Vol. 21, Issue 3, 032501 (2023)
Tiancai Wang1、2, Peng Cao1、2, Hongling Peng1、3、*, Chuanwang Xu1、2, Haizhi Song4, and Wanhua Zheng1、3、5、6、**
Author Affiliations
  • 1Laboratory of Solid-State Optoelectronics Information Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 2College of Electronic and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 3State Key Laboratory on Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 4Southwest Institute of Technology Physics, Chengdu 610041, China
  • 5Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 6Weifang Academy of Advanced Opto-electronic Circuits, Weifang 261021, China
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    DOI: 10.3788/COL202321.032501 Cite this Article Set citation alerts
    Tiancai Wang, Peng Cao, Hongling Peng, Chuanwang Xu, Haizhi Song, Wanhua Zheng. High-uniformity 2 × 64 silicon avalanche photodiode arrays with silicon multiple epitaxy technology[J]. Chinese Optics Letters, 2023, 21(3): 032501 Copy Citation Text show less

    Abstract

    In this paper, high-uniformity 2×64 silicon avalanche photodiode (APD) arrays are reported. Silicon multiple epitaxy technology was used, and the high performance APD arrays based on double-layer epiwafers are achieved for the first time, to the best of our knowledge. A high-uniformity breakdown voltage with a fluctuation of smaller than 3.5 V is obtained for the fabricated APD arrays. The dark currents are below 90 pA for all 128 pixels at unity gain voltage. The pixels in the APD arrays show a gain factor of larger than 300 and a peak responsivity of 0.53 A/W@M = 1 at 850 nm (corresponding to maximum external quantum efficiency of 81%) at room temperature. Quick optical pulse response time was measured, and a corresponding cutoff frequency up to 100 MHz was obtained.

    1. Introduction

    With the recent rapid development of driverless cars, the need of lidar is attracting researchers’ attention again. As an important component of lidar detection[1], compared with other materials[24], silicon avalanche photodiode (APD), especially APD arrays, is the commonly used device for photon detection at visible light and near-infrared wavelengths (λ<1100nm)[5] because of its high gain factor[6,7], high speed[1,8,9], low dark current, low cost[10], and low noise[11]. Additionally, APD is also one of the best choices for topographic monitoring and aerospace[12] because of the reliability and stability of silicon.

    In these years, many works focusing on unit APDs were made and optimized[13]. In 2004, the principles of operation and considerations of design on APD were outlined by Węgrzecka et al.[14]. After the design, the fabrication process and device characteristics of silicon APDs were developed at the Institute of Electron Technology (ITE) (ITE APDs). In 2019, Aruev et al.[15] reported a high sensitivity APD that demonstrated several characteristics, including a sensitivity of 80–85 A/W at 900–1010 nm, a dark current of 1.5 nA, and leading and trailing edges shorter than 2.5 ns at a reverse bias voltage of 350 V. In the same year, another research group in Russia came up with a silicon extreme ultraviolet (XUV) APD structure focusing on a spectral response of 320–1100 nm with a 1.5-mm-diameter active region and an external quantum efficiency (EQE) up to 20 electrons/photons in the 580–1000 nm range at a reverse bias of 485 V[16].

    However, single APDs can satisfy the needs of optical communication and weak light detection well, but not for the lidar imaging. Silicon APD arrays are quite proper for this use and various types of APD arrays have been fabricated by researchers and companies during these years.

    As for commercial APD arrays, a 4×8 silicon APD array product with a photosensitive area 1.6mm×1.6mm per element, a breakdown voltage at about 400 V, an APD gain factor of about 50, and a dark current of 10 nA was fabricated at Hamamatsu Photonics, Japan[17]. First Sensor Corporation in Germany released a 8×2 silicon APD array with a 1.0mm×0.5mm photosensitive area, and specific properties of this APD product[18] include a breakdown voltage at about 160 V, a gain factor at about 100, and a dark current of 0.1 nA. In addition to these two companies, Laser Components[19] also produced a 4×4 APD array with a photosensitive area of 0.62mm×0.19mm. The breakdown voltage and the elemental APD gain factor of this APD array are 150 V and 100, respectively, and the dark current is 4 nA.

    The commercially available APD arrays so far have used multiple ion implantation technique followed by thermal annealing to drive in the junction and form the working layers. However, multistep and long-time thermal annealing junction drive-in (LTTAD) will lead to nonuniformity of doping in those layers, which will result in nonuniformity of the electric field, breakdown voltage, and other properties of each unit device. Therefore, the uniformity of the APD arrays is always a hindrance for large size array application. In this paper, epitaxy layers based on silicon multiple epitaxy technology were designed (including multiplication layer and absorption layer); then the APD arrays on silicon epitaxy layers are demonstrated without using multistep annealing drive-in (for the first time, we believe). As a result, a high-uniformity breakdown voltage with a fluctuation of smaller than 3.5 V is achieved for the fabricated 2×64 silicon APD arrays, and this technology can be a promising method for future commercial APD arrays. The dark currents are all below 90 pA for the whole array. In addition, the pixels in the arrays show a gain factor of larger than 300 and a peak responsivity of 0.53A/W@M=1 at 850 nm (corresponding to maximum EQE of 81%) at room temperature. Also, the p-type channel stopper was applied between pixels to prevent adjacent cross talk. Quick optical pulse response was measured and a cutoff frequency of 100 MHz was demonstrated. This method, based on a double-layer epiwafer, will be a promising way for further fabrication and application.

    2. Design and Fabrication

    Although a separated absorption, charge, and multiplication (SACM) structure has been proposed for many years[7,2022], a separated absorption and multiplication (SAM) structure is still mainly used by current commercial silicon APDs and arrays. Based on this structure, a double-layer silicon epiwafer was calculated and fabricated. The voltage and electric field distribution can be represented in the following equations[23]: E(X)=EmqεNπX,0Xb,E(X)=EmqεNπbqεNπ(Db),bXD.

    The junction voltage can be derived from Eqs. (1) and (2), V=EmD12qNBb(2Db)12qNπ(Db)2.

    Furthermore, the maximum electric field Em is shown as follows: Em=qNBb+qNπ(Db)+ΔVW,and the breakdown voltage VB can be derived from Eqs. (3) and (4), VB=12qb2(NBNπ)+12qεNπD2+ΔV,where NB is the doping concentration of the multiplication layer, Nπ is the doping concentration of the absorption layer, b is the thickness of the multiplication layer, D is the total thickness of the absorption and multiplication layers, q is an elementary charge, ε is the relative permittivity of silicon, and ΔV is the deviation value caused by edge breakdown and other factors in the fabrication process.

    As for the double-layer silicon epiwafer, a 35 µm thick absorption layer (A-layer) with a doping concentration of 5×1012cm3 was deposited on highly-doped substrate, and a 5 µm thick multiplication layer (M-layer) with a doping concentration of 1×1015cm3 was subsequently deposited on the A-layer by low-pressure chemical vapor deposition (LPCVD), just as shown in Table 1.

    EpilayerDoping concentration (cm3)Thickness (μm)
    Multiplication layer1×1015 (p-type)5
    Absorption layer5×1012 (p-type)35

    Table 1. Epistructure of the Device

    For fabrication process of the APD arrays, first, the epiwafer was implanted with boron of 200 keV energy and 5×1014cm3 dose to form the stopper, which is used to isolate the adjacent pixels. Second, the guard ring was formed by an implantation with 80 keV energy and 2×1015cm3 dose to prevent edge breakdown. Third, the p-n junction and heavy doping for ohm contacts were formed by sequentially implanting the selected region with phosphorus at low energy and high dose. After that, a high-temperature annealing was employed immediately to activate the implanted dopants and repair the implanting damage, including boron and phosphorus. The simplified annealing procedure can effectively avoid lateral diffusion and improve the uniformity of APD arrays. Fourth, the passivation layer was formed by thermal oxidation to reduce the dark current. Subsequently, the antireflection film was formed to improve the EQE. Fifth, an electric injection channel was etched out, and then a TiAu alloy was deposited and patterned to form the metal pads. Finally, another TiAu alloy was deposited after the chemical-mechanical polishing (CMP) on the back side. Thus, the APD array with a size of 0.9mm×14mm was obtained. Figures 1(a)1(g) show the fabrication process flow of an element device in the array, and Fig. 1(h) shows the final optical microscopy image of partial fabricated arrays.

    Key fabrication process of the silicon APD array and microscope photograph of partial fabricated arrays. (a) Epitaxial wafer growth; (b) implantation of P-stopper; (c) implantation of guard-ring and rapid thermal annealing; (d) implantation for ohm contact and rapid thermal annealing; (e) antireflection film deposited and etched; (f) TiAu deposition and patterning; (g) CMP on the back side; (h) metallization on the back side; (i) microscope photograph of partial fabricated arrays.

    Figure 1.Key fabrication process of the silicon APD array and microscope photograph of partial fabricated arrays. (a) Epitaxial wafer growth; (b) implantation of P-stopper; (c) implantation of guard-ring and rapid thermal annealing; (d) implantation for ohm contact and rapid thermal annealing; (e) antireflection film deposited and etched; (f) TiAu deposition and patterning; (g) CMP on the back side; (h) metallization on the back side; (i) microscope photograph of partial fabricated arrays.

    3. Device Characteristic and Discussion

    For APD arrays characterization in this Letter, the zolix DSR300 spectral responsivity measurement system for micro- and nanodevices was employed, just as shown in Fig. 2. The test system is mainly composed of a monochrome light source, a CCD camera, several sets of optical lenses, and a source meter (Keithley 2635B). In the actual test, we used a combination of monochromatic light source and monochromator to achieve wavelength scanning and selection. Before the responsivity and photocurrent measurement, a Hamamatsu standard avalanche photodetector was used to calibrate the system light source and lens; then the device to be tested was placed on the sample table and measured. The data was collected by a Keithley 2635B simultaneously during the test.

    Brief schematic of the APD arrays measurement system (a monochromatic light source was used in the actual measurement).

    Figure 2.Brief schematic of the APD arrays measurement system (a monochromatic light source was used in the actual measurement).

    First, all 128 pixels in the fabricated APD arrays were measured with the DSR300 system at room temperature; Fig. 3(a) shows their reverse curent-voltage characteristics without light illumination. It can be seen that all pixels in the fabricated APD arrays show good hard avalanche breakdown. In addition, the dark currents are all about below 90 pA under the punch-through state, and the breakdown voltage is all near 105 V. Here, the breakdown voltage is defined as the voltage when the dark current reaches up to 10 µA[24]. However, the designed breakdown voltage calculated from Eq. (5) is about 140 V, which contains some deviation from the breakdown value of the fabricated device. The difference between the calculated value and the tested value may be caused by some uncertainties in the APD array fabrication process, which will be identified in our future work.

    Uniformity of 2 × 64 fabricated APD arrays. (a) Dark currents of all pixels as a function of reverse bias voltage; (b) profile of breakdown voltage and dark current at unity gain; (c) two-dimensional mapping of dark current at unity gain (unit, pA); (d) two-dimensional mapping of Vbr for pixels.

    Figure 3.Uniformity of 2 × 64 fabricated APD arrays. (a) Dark currents of all pixels as a function of reverse bias voltage; (b) profile of breakdown voltage and dark current at unity gain; (c) two-dimensional mapping of dark current at unity gain (unit, pA); (d) two-dimensional mapping of Vbr for pixels.

    Furthermore, the uniformity of our 2×64 silicon APD arrays based on the silicon multiple epitaxy wafer was investigated. The profile of breakdown voltage (Vbr) and dark current at punch-through state for all pixels is shown in Fig. 3(b). It can be seen that the Vbr of all pixels of the fabricated APD arrays are in high uniformity compared with traditional multiple junction drive-in APD arrays. A breakdown voltage (BV) variation less than 3.5 V is obtained for the arrays, and the dark currents at punch-through state are all about below 90 pA. This high uniformity can be attributed to the silicon multiple epitaxy technology and the reduced fabrication process variation.

    Furthermore, Figs. 3(c) and 3(d) show the two-dimensional mapping of Vbr and dark currents at unity gain for all pixels in fabricated APD arrays, respectively. It is demonstrated that over 95% of the pixels show uniform characteristics and few bad devices in arrays are regularly related to the locations. By further reducing the times of ion implantation and annealing time, the slight fluctuation of breakdown voltage and dark current will be reduced with a more simplified process.

    As shown in Fig. 4(a), the responsivity and EQE for one pixel were characterized as a function of wavelength ranging from 300 to 1100 nm. At 850 nm, a peak responsivity of 0.53 A/W was obtained, corresponding to a maximum EQE of about 81%. It should be pointed out that the EQE of the fabricated pixel still remains significant (more than 20%) in ultraviolet wavelength range due to a surface shallow p-n junction in this work. Furthermore, the measured dark current and photocurrent with increasing reverse bias voltage at room temperature are shown in Fig. 4(b). The gain factor is then calculated from Eq. (6)[25], Gain=IphotoIdarkIphoto-punchthrough,and it can be calculated from Eq. (6) that the gain factor increases sharply in a reverse voltage range of 100 to 110 V, which may be attributed to an approach to the breakdown voltage. In addition, a gain factor larger than 300 was obtained, which is quite consistent with commercial APD devices.

    Measurement results of response and multiplication characteristics for one pixel in the fabricated APD arrays. (a) Response characteristics at unity gain; (b) reverse I-V curves near breakdown state.

    Figure 4.Measurement results of response and multiplication characteristics for one pixel in the fabricated APD arrays. (a) Response characteristics at unity gain; (b) reverse I-V curves near breakdown state.

    Finally, some dynamic characteristics, including capacitance and quick optical pulse response, were measured and calculated for one pixel. Figure 5(a) shows the measured capacitance for one pixel under different reverse voltages. The measurement frequency and voltage step are 1 MHz and 1 V, respectively. It can be clearly seen that the capacitance decreases rapidly as the reverse voltage increases, and it is below 1 pF at punch-through voltage state, which is comparable to some Hamamatsu products, like the S14645 series. In addition, to obtain the cutoff frequency of the fabricated APD (FRAPD) arrays, quick optical pulse response for standard ET2020 APD (STAPD) and one pixel of fabricated arrays were measured and calculated, as shown in Figs. 5(b) and 5(c). From Fig. 5(b), it can be seen the rise time of STAPD is 3.25 ns and from Fig. 5(c), the rise time is 3.15 ns for FRAPD, with an applied reverse bias voltage of 25 V. The longer measurement result than theoretical value (1.08 ns) is due to the capacitance introduced by the package and the circuit used for measurement.

    Dynamic characteristics for one pixel. (a) Capacitance versus reverse voltage; (b) quick optical pulse response of standard ET2020 APD; (c) quick optical pulse response of fabricated APD in this work.

    Figure 5.Dynamic characteristics for one pixel. (a) Capacitance versus reverse voltage; (b) quick optical pulse response of standard ET2020 APD; (c) quick optical pulse response of fabricated APD in this work.

    4. Conclusion

    In summary, a high-uniformity 2×64 silicon APD array based on a double-layer epiwafer was designed and fabricated for the first time in this study. As a result, a high-uniformity breakdown voltage with a fluctuation smaller than 3.5 V is achieved, and the dark currents are all about below 90 pA for all the APD arrays. Moreover, the pixels in the fabricated arrays show a gain factor of larger than 300 and a peak responsivity of 0.53A/W@M=1 at 850 nm (corresponding to maximum EQE of 81%) at room temperature. Compared to the reported array devices mentioned in Section 1, as shown in Table 2, a much larger array was fabricated. Also, high EQE and responsivity were obtained, while the uniformity of our fabricated array was improved. It is demonstrated that multiple silicon epitaxy technology can effectively reduce the process variation and improve the uniformity of arrays. Additionally, the cutoff frequency higher than 100 MHz was derived through the quick optical pulse response measurement. In addition, the high-uniformity APD arrays are less restricted to readout circuit than LTTAD APD arrays, and this technology may be promising for high-uniformity commercial APD arrays and applications.

     Ref.Apixel (mm2)NpixelVariationEQE (850 nm)VBR (V)
    1[17]81.924×815%78%400
    2[18]4.12×85%82%200
    3[19]1.952×85%80%150
    4This work12.62×643%81%105

    Table 2. Performance Comparison of Different Reported Silicon Avalanche Photodiode Arrays

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    Tiancai Wang, Peng Cao, Hongling Peng, Chuanwang Xu, Haizhi Song, Wanhua Zheng. High-uniformity 2 × 64 silicon avalanche photodiode arrays with silicon multiple epitaxy technology[J]. Chinese Optics Letters, 2023, 21(3): 032501
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