
- Photonics Research
- Vol. 8, Issue 11, 1776 (2020)
Abstract
1. INTRODUCTION
With the ever-increasing demand for high-speed intra- and inter-data-center connections, optical transceivers with lane rates of 100 Gbit/s are standardized in IEEE Standard 802.3bs [
The works just listed focus on single-channel high-speed transmission. For the silicon platform, monolithic integration, which means complex and/or multi-channel functions are fabricated on the same photonic integrated circuit (PIC) chip, is also an important metric for commercial application [
In this paper, a four-channel SiP MZM chip is integrated with a four-channel driver chip by chip-on-board co-packaging, and a high-speed four-channel SiP transmitter is fabricated. 800 Gbit/s PAM-4 signal transmission and 480 Gbit/s OOK signal transmission using the co-packaged four-channel SiP transmitter are experimentally demonstrated for the first time, to the best of our knowledge. Offline DSP is applied both in the TX side and RX side as pre- and post-compensation to deal with BW limitation and chromatic dispersion (CD) penalty. Different baud rates of PAM-4 signal and OOK signal are modulated on each channel of the transmitter, and the B2B BER is measured to study the uniformity of different channels. Transmission penalty of the PAM-4 and OOK signals for 500 m and 1 km SSMF is then experimentally tested by using one channel of the transmitter, which shows that a 200 Gbit/s PAM-4 signal could achieve 1 km SSMF transmission with the BER lower than the SD-FEC threshold. For the OOK signal, after 500 m and 1 km SSMF transmission, the data rate shrinks to 119 Gbit/s and 118 Gbit/s with SD-FEC threshold. The 800 Gbit/s PAM-4 signal with 1 km transmission is tested, and the BER of each channel is below the SD-FEC threshold.
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2. SiP TRANSMITTER DESIGN AND FABRICATION
Figure
Figure 1.(a) Micrograph of the chip-on-board SiP transmitter that co-packaged a four-channel MZM chip and a four-channel driver by wire bonding on the evaluation board, (b) micrograph of the travelling wave electrode, and (c) schematic diagram of the active waveguide’s cross section.
The design and fabrication process of the SiP MZM are improved from our previous work [
Figure 2.EO S21 of the (a) SiP modulator and (b) SiP transmitter co-packaged with the driver.
The four-channel SiGe driver is co-designed with the SiP MZM chip, according to the modulator’s circuit model. To enable more than 100 Gbaud per-lane transmission, the driver is well designed to achieve high BW with our experience in EO co-design [
The driver is wire bonded to the SiP chip on a PCB board. The frequency responses of the co-packaged transmitter are measured and displayed in Fig.
3. SIP TRANSMITTER MEASUREMENT
A. Experiment Setup
The high-speed transmission character of the SiP transmitter is experimentally measured using the setup shown in Fig.
Figure 3.Experiment setup of the PAM-4/OOK signal transmission with TX and RX DSP.
The AWG is connected to the SiP transmitter directly by matched RF cables. In the SiP transmitter, PAM-4/OOK signals are amplified by a co-packaged four-channel driver and then modulated on SiP high-speed MZMs. Two commercial continuous-wave (CW) lasers with output power of
The four-channel modulated signal of the SiP transmitter is coupled out by a four-channel FA with optical power of about
In RX-DSP, the captured data are first re-sampled to two samples per symbol (SPS) and filtered by matched RRC filter. Then the data sequence is down-sampled to one SPS and synchronized with original PAM4/OOK bitstreams that are loaded into the AWG. Adaptive time-domain EQ, which is a 51-tap finite-impulse response (FIR) filter based upon the least-mean-square (LMS) error algorithm, is applied for channel estimation and EQ. After the time-domain EQ, the maximum likelihood sequence estimation (MLSE) algorithm in cooperation with an adaptive post-filter is applied to realize faster than Nyquist transmission. An adaptive post-filter could suppress the noise enhanced by time-domain EQ, and the MLSE could eliminate both the residual inter-symbol interference (ISI) of time-domain EQ and the ISI generated by the post-filter. To realize rapid convolution and optimize the factor of filter taps, a training sequence with bit length of 4096 is used both in time-domain EQ and the adaptive post-filter. Finally, BER is calculated for both the PAM-4 signal and OOK signal.
B. B2B BER of Four Channels
The 800 Gbit/s (
Figure 4.B2B BER with respect to different data rates for the (a) PAM-4 signal and (b) OOK signal.
For the 200 Gbit/s PAM-4 signal, the BER of each channel is around the HD-FEC threshold (e.g.,
Figure 5.B2B eye diagrams plotted in DSP with different baud rates after time-domain EQ for the (a) PAM-4 signal and (b) OOK signal.
C. 500 m and 1 km Fiber Transmission
The BERs after the 500 m and 1 km SSMF transmission are also measured for both the PAM-4 signal and OOK signal to check the transmission penalty. Because the uniformity of the four channels was proven to be good in Section 2, the BER penalty of 500 m and 1 km transmission is illustrated using just one channel (channel 3). The BERs of the PAM-4 signal with different data rates after 500 m and 1 km SSMF transmission are shown in Fig.
Figure 6.BERs with respect to different data rates for the (a) PAM-4 signal and (b) OOK signal after 500 m and 1 km SSMF transmission.
The 800 Gbit/s (
Figure 7.BERs of all four-channel PAM-4 signals with respect to different data rates after 1 km SSMF transmission.
4. CONCLUSION
We experimentally demonstrate the transmission of an 800 Gbit/s PAM-4 signal up to 1 km SSMF based on a four-channel integrated SiP transmitter. The SiP transmitter is fabricated by co-packaging a four-channel high-speed silicon TW-MZM chip with a four-channel driver chip. The 3 dB BWs of the silicon MZM chip and the co-packaged transmitter are over 60 GHz and 40 GHz, respectively. DSP is implemented both at the TX side and RX side, which is necessary to compensate for the BW limitation and CD with 500 m/1 km SSMF transmission. The B2B BERs for 800 Gbit/s (
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